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 Clock Tree.

• We recommend to use Trace Buffers function instead, though Clock tree still works.
• Enable Options->'Clock Tree' to make fanout trace in clock tree mode. That is only drawing combination logic no flipflops or latchs.
• Setup flipflop pattern in GofViewer->Options->Setup->Misc->Parameter flip_flop_pattern item

• This feature is very useful in low power design with a lot of gated-clocks.
• Click on clock cell's output pin, the net will become "netname:#num:c" meaning how many fanouts.

• In postlayout netlist a lot of clock buffers have been added by layout tool. GofTrace can very easily isolate these buffers by enable clock tree option.
• Compare with the schematic from prelayout. You will find out which buffers are inserted by the layout tool.

• Execute 'View cells in layout' will give you the idea of clock tree distribution in layout.
• Note: PDEF file should be loaded before doing this command. See GofViewer Action Menu.

• The following schematic shows the clock cells distribution in layout. The arrow indicates the fanin/fanout direction.

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