buffer

ECO command. Buffer high fanout ECO nets
Usage:
buffer($net_names, $buffer_name, $fanout);
$net_names: Net names to be buffered. Use "," to separate multiple nets, like "eco1_net1,reset2"
$buffer_name: The buffer module name from library, leave it blank to let the tool pick one.
              It supports releater case by ",", for example, "INVX1,INVX16" would have 'INVX1'
              drives 'INVX16' and 'INVX16' drives the fanouts.
$fanout: How many fanout to insert a buffer.

Examples:
#1. For every 10 fanout of test_mode, add a buffer, BUFX6
buffer("test_mode", "BUFX6", 10); 
#2. For every 10 fanout of 'clock', add repeaters, INVX2,INVX16
buffer("clock", "INVX2,INVX16", 10);
#3. Let the tool pick a buffer
buffer("clock", "", 10);

change_gate

ECO command. Modify an instance in ECO.
Two types of usages
Usage1:
change_gate($instance, $new_reference, $pin_mapping);
$instance: The instance under ECO. Support hierarchical name, "u_abc/U123"
$new_reference: The new reference which the instance will change to, E.G. 'AND3X1'. 
                If no reference is present, the ECO operation is assumed to 
                  change the instance's pin connections.
$pin_mapping: Input pins mapping, ".new(old)", E.G. ".A1(A),.B1(B)"
              if two references have same input pins. The option can be empty
Usage2:
change_gate($instance, $pin_connections);
$pin_connections: New pin connections, ".A(n242)".
                  The unspecified pins will keep the original connection.
                  E.G. pin 'B' connection is unchanged.

Examples:
#1. U123 has reference OR3X1 with input pins, A,B,C originally
# change U123 to AND3X1, all input pins are the same.
change_gate('U123', 'AND3X1', ""); 
#2. A and B keep the connections, discard C
change_gate('U123', 'AND2X1', "");

#3. A keeps the connections, B connects to what the old C connects. And discard old B
change_gate('U123', 'AND2X1', ".B(C)"); 

#4. A,B,C keep the same, and new D pin connects to net n123
change_gate('U123', 'AND4X1', ".D(n123)"); 
#5. AO21X1 has input pins, A0, A1 and B0 
change_gate('U123', 'AO21X1', ".A0(A),.A1(B),.B0(C)");

#6. change U123 A to n123, B to n124, keep C connection. 
change_gate("U123", ".A(n123),.B(n124)"); 

#7. Rotating A/B/C connections.
change_gate("U123", ".A(B),.B(C),.C(A)"); 

change_net

ECO command. Change a exsiting net's driver
Usage:
change_net($net, $gate, $instance, $connections);
$net: The net to be ECOed
$gate: New leaf gate to drive the net
$instance: The instance name of the new gate. Optional, if it is empty, assigned by the tool
$connections:  The new gate input pins connections. If it is empty, the gate will be inserted in the net
   Supported formats, 1. Very detail  ".A(net0),.B(net1),.C(net2)"
                      2. Connect to the pins in alphabical sequence 
                          "net1,net0,net2" indicating A->net1,B->net0,C->net2
                      3. Other instance/pin "U408/Y,U409/Y,net2" indicating A->U408/Y,B->U409/Y,C->net2
                      4. Special character '-' is used to connect up the original connection

Examples:
#1. Drive n123 with BUFX2 driven by n40
change_net("n123", "BUFX2", "", "n40");   
#2. Drive n123 with AND2X2 driven by n40 and original n123 driver
change_net("n123", "AND2X2", "", "-,n40");    
#3. Insert a buffer into n123
change_net("n123", "BUFX2");   

change_pin

ECO command. Modify pin connection in ECO.
Two types of usages. 

Usage1:
change_pin($pin_name, $net);
Change pin's connection to a net
$pin_name: In the format of "instance/pin", can be more than one pins separated by ",",
             "instance1/pinA,instance2/pinB", E.G. "U123/A", "U123/A,U345/B"
             Hierarchical naming style is supported as well, "u_abc/U123/A"
             The pins have to be input in this mode.
$net: The net name the pin will connect to.
      Hierarchical naming style is supported, "u_abc/net123"
      When the pin and the net are in different hierarchies, ports will be added automatically
      E.G. 
      # The tool will create 4 ports across the hierarchies to connect the net to the pin.
      change_pin("u_abc/u_cde/U200/A", "u_xyz/u_stv/net300");
      # The tool will get the net tie to Y pin of U300 and do the the same as the previous example.
      change_pin("u_abc/u_cde/U200/A", "u_xyz/u_stv/U300/Y");

Usage2:
my $inst = change_pin($pin_name, $leaf_cell, $new_instance, $connection);
Insert a new leaf cell to drive the pin
$inst: Return new instance name if new gate is created in the command.
$pin_name: In the format of "instance/pin", E.G. U123/A  Hierarchical naming is supported, u_abc/U123/A
           The pin can be output in this mode. The tool will get the net the pin drives,
             and change the command to 
             change_net($thenet, $leaf_cell, $new_instance, $connection);
$leaf_cell: The leaf cell name to drive the $pin_name
$new_instance: The instance name for the new inserted leaf cell. 
               The option is optional, the tool will assign one if it's empty
               If use '.', the instance will be added to the same hierarchy as the $pin_name
$connection: The pins connection for the new cell. 
   Supported formats, 1. Detail format:  ".A(net0),.B(net1),.C(net2)"
                      2. Simple format: Connect to the pins in alphabical sequence "net1,net0,net2"
                      3. Mixed format: "u_abc/U123/Y,.B(net1),net2"
                      4. Special character '-' is used to connect up the original connection
                      5. Advanced nesting format: 
                         change_pin("U189/A", "AOI21X2", "", "U190/Y,,BUFX6(BUFX6(BUFX6(n412)))");

Note:
All strings should be quoted by ' or " to avoid syntax error or undisired effects.
      If net or instance name has '\', single quotation has to be used.
      A instance can have '\' droped in the name, the tool can automatically decide 
        if '\' is needed in the name.

Examples:
#1. U123 has input pins A,B,C, U234 has input pins A0,A1,B
# Change A pin of U123 to net12345
change_pin("U123/A", "net12345"); 
#2. Change A pin of U123 to $net which is defined in the ECO script.
change_pin("U123/B", $net); 
#3. Change A pin of U123 to net12345
change_pin("U123/A,U234/B", "net12345");

#4. Insert "NAND2X2 eco12345_U0(.A(net1234),.B(net5678));"
# to drive U123/A
change_pin("U123/A", "NAND2X2", "eco12345_U0", "net1234,net5678"); 

#5. Same as above, with more detail of pin connections
change_pin("U123/A", "NAND2X2", "eco12345_U0", ".A(net1234),.B(net5678)"); 

#6.Insert a buffer to U123 A pin
change_pin("U123/A", "BUFFX4", "", "-"); 

#7. Insert NAND2X1 to drive CK pin and new A connects to the original net
change_pin("abc_reg_1_/CK", "NAND2X1", "", ".A(-),.B(1'b1)"); 
#8. Do hierarchical connection
change_pin("u_abc/u_cde/U200/A", "u_xyz/u_stv/U300/Y"); 
#9. Nested connection
change_pin("qcif/num2/u_spare1/B", "AOI21X2", "eco_inst_on_top1", \
           "NAND2X2(gte_344/u_smod/U100/Y, gte_344/n114), gte_343/U111, BUFX6(BUFX6(n105))");

change_port

ECO command. Change an output port's driver, or add gate after input port 
Usage1:
change_port($port, $gate, $instance, $connections);
$port: The port under ECO, can be input port or output port
$gate: New leaf gate to drive the port if the port is output
       Or add the gate after input port
$instance: The instance name for the new leaf cell, optional, the tool will assign one if it's empty
$connections: The new gate input pins connections. If it is empty, the gate will be inserted in the net
   Supported formats, 1. Very detail  ".A(net0),.B(net1),.C(net2)"
                      2. Connect to the pins in alphabical sequence 
                          "net1,net0,net2" indicating A->net1,B->net0,C->net2
                      3. Other instance/pin "U408/Y,U409/Y,net2" indicating A->U408/Y,B->U409/Y,C->net2
                      4. Special character '-' is used to connect up the original connection
Usage2:
change_port($port, $inst_pin);
$port: The port under ECO, output port
$inst_pin: In the format of 'u1234/Y', instance-name/pin-name
Note:
The difference of change_net and change_port command
      change_net changes all drains of the net.
      change_port changes only the port driver.
Examples:
#1. Add buffer to output port 'out1'
change_port("out1", "BUFX1", "eco_buf0", "-");

check_design

Check if the design has unresolved modules, floating and multidrivers
Usage:
check_design(@options);
@options:
   -ignore list: Ignore the issues matching the list, E.G. 'FE_UNCONNECT*,SCAN_*'. 
   -eco: Only check instances/wires having been done ECO. Default check all instances/wires
   -fixfile filename: Create ECO fix file
Examples:
check_design;
check_design('-ignore', 'FE_UNCONNECT*');
check_design('-ignore', 'FE_UNCONNECT*,SCAN_*');
check_design("-eco");

compare_nets

Check equivalence of two nets in the reference and implementation netlist
Usage:
my $result = compare_nets($net0, $net1, @options);
$net0: The net in the reference netlist.
$net1: The net in the implementation netlist.
@options:
   -flatten: Work in the flatten, by default, the check is done in current module scope
$result: If 1, they are equal, if 0, they are not equal.
Examples:
# Compare reg1/D in the reference and reg1/D in the implementation netlist
compare_nets("reg1/D", "reg1/D");
# Compare reg1/D in flatten mode
compare_nets("reg1/D", "reg1/D", "-flatten");

del_gate

ECO command. Delete gate
Usage:
del_gate($inst);
$inst: The instance to be deleted.

del_net

ECO command. Delete net
Usage:
del_net($net);
$net: The net to be deleted.

del_port

ECO command. Delete port
Usage:
del_port($port);
$port: The port to be deleted.

exist_inst

Check if an instance exists
Usage:
my $ret = exist_inst($inst);
$inst: The instance for checking
$ret: 1, the instance exists 0, the instance does not exist

exist_wire

Check if exist the wire
Usage:
my $ret = exist_wire($wire);
$wire: The wire name for checking
$ret: 1: exists 0: not exist

fix_hold

ECO command. Fix hold time violations.
Timing violation report file has to be read by read_file API before calling this API
Usage:
my $status = fix_hold(@options);
@options:
    -margin value: Hold violation margin threshold value to insert buffer, default 0
                   if one path has margin lower than this value, buffers are inserted
    -buffer name:  Name of buffer to be inserted
    -bufdelay value: Estimated buffer delay value, in 'ns', 1.0ns by default. E.G. -bufelay 0.9
$status: If zero, fix_hold is successful
         if one, fix_hold fails
Examples:
#1. Prime time report file
#   The goal is to make all paths have hold slack above 0.5ns
#   The tool will figure out the delay number of 'BUFX10'
my $status = read_file("soc_primetime_hold.report", "-format", "pt");
$status = fix_hold("-margin", 0.5, "-buffer", "BUFX10");
write_verilog("soc_hold_fix.v");

#2. AccuCore timing report file
#   'BUFX10' has been specified to have 0.9 ns delay
my $status = read_file("soc_accurcore_hold.report", "-format", "accu");
$status = fix_hold("-margin", 0.5, "-buffer", "BUFX10", "-bufdelay", 0.9);
write_verilog("soc_hold_fix.v");

fix_logic

ECO command. Fix Implementation Netlist logic by Reference Netlist
Usage:
fix_logic(@pin_port_list, @options);
@pin_port_list: 
    List of the pins or ports whose logic will be fixed by the reference logic in reference netlist
     The format is "sic_cnt_reg_0/D","sic_cnt_reg_1/D","bbr_ccd_reg[0]/D","out_port"
     '\' should be dropped if the instance has '\' as prefix. 
     E.G. 'bbr_ccd_reg[0]' has real name '\bbr_ccd_reg[0] ' in the netlist
@options:
    -help: Print out this information
    -keepfreed: Keep freed instances, by defaule all output floating gates caused by ECO will be removed
    -noopt:   No optimization on front side
    -recover value: The effort to recover removed gates, default 9, highest effort, valid from 0 to 9
Examples:
#1. Fix state_regs's D inputs
fix_logic("state_reg_0/D", "state_reg_1/D");
#2. Fix state_regs's D inputs and one output port
fix_logic("state_reg_0/D", "state_reg_1/D", "out_port");
#3. Fix state_regs's D inputs and one output port and don't delete floating gates
fix_logic("state_reg_0/D", "state_reg_1/D", "out_port", "-keepfreed");

fix_setup

ECO command. Fix Setup time violations.
Timing violation report file has to be read by read_file API before calling this API
Usage:
my $status = fix_setup(@options);
@options:
    -margin value: Setup violation margin threshold value to insert buffer, default 0
                   if one path has margin lower than this value, it will be fixed
$status: If zero, fix_setup is successful
         if one, fix_setup fails
Examples:
my $status = read_file("soc_primetime_setup.report", "-format", "pt");
$status = fix_setup("-margin", 0.2); # The goal is to make all paths have setup slack above 0.2ns
write_verilog("soc_setup_fix.v");

get_cell_info

Get information of a module or instance
Usage:
$data = get_cell_info($module_or_inst, @options);
$module_or_inst: The module or instance's name
@options:
    -help: Print out this information
    -conns: Get Connections of the item, only when it's instance
    -type: Get the item's type information. It can be 'ff','cg,'latch','buf', 
            run 'get_lib_cells -type_info' for all existing type in the current libraries
            An array will be returned if this option is present
    -libname: Get the library name that the cell is in
    -area: Get the area of the item
    -size: Get the size of the item
    -leakage: Get the leakage of the item
    -ref:     Same as 'get_ref instance' if the item property is instance
    -context: Get detail library information
    -attribute attribute_name: Check if the cell has the attribute set. 0 or 1 is returned
$data: Returned data, if '-attribute' option is present, $data is 0 or 1
In option is '-conns' case,
It is a hash having the following data structure
my $module = $hash->{module};
my $instance: $hash->{instance};
foreach my $port (keys %{$hash->{connections}}){
    my $net = $hash->{connections}{$port};
}

If no option is present, it return the item's property:
leaf_instance leaf_module hierachical_instance hierarchical_module 

Examples:
my $area = get_cell_info("AND2X2", "-area");
my $is_iso = get_cell_info("ISOX2", "-attribute", "is_isolation_cell");

get_cells

Get all cells in the current module or sub-modules
Usage:
my @cells = get_cells($pattern, @options);
$pattern: The pattern matching instance name, '*', 'U*', 'U123' or '/UI_.*_./' 
@options:
    -help: Print out this information
    -hier: Or -h, do the command hierarchically
    -ref ref_pattern: Get cells that has reference matching ref_pattern, E.G. -ref OAI*
    -type type_pattern: Type_pattern can be 'ff','latch','cg','not' ... 
                        run 'get_lib_cells -type_info' for all existing type in the current libraries
    -type_match type_pattern: Get cells that have one of the types matches the type_pattern
    -leaf: Only leaf cells
    -verbose: To print out reference with instance
    -dotpath: Path delimit is '.' instead of '/'
    -nobackslash: Remove backslash 
@cells: Returned array with all instances matched

Examples:
#1. Get all instances in the current module 
get_cells('*');
#2. Get all instances in the current module 
get_cells();
#3. Get all instances matcing 'U234*' in the current module
get_cells('U234*');
#4. Regular expression. Get all instances starting with U and followed by 
#    two characters, like U10, U99
get_cells('/U../');   
#5. Get all instances matching *reg_*_ hierarchically
get_cells('*reg_*_', '-hier');
#6. Get all instances hierarchically and having reference matching DFF*
get_cells('*', '-hier', '-ref', 'DFF*');

get_conns

Get connections of net or pin in the top level module, return the leafs and the hierarchical connections
Usage:
@result = get_conns($net_or_pin, @options);
$net_or_pin: The net name or pin name that needs to get connections.
@options:
   -pin: Return inst/pin format
   -driver: Return driver only
   -load: Return load only
   -count: Return connections count
@result: a two dimension array
          instance, port_name, pin_or_port, load_or_driver, is_it_a_leaf, 
@result = ([instance_0, pin_0, 'pin', 'load', 1],
           ...
          )
Examples:
#1. n599 has three connections, U198 is the driver
get_conns("n599");
gte_344 A[14] pin load 0
U198 Y pin driver 1
U94 AN pin load 1

#2. qcifhbeat has three connections, it is output port of the current top level module
get_conns("qcifhbeat")
 qcifhbeat port load
U80 A pin load 1
qcifhbeat_reg Q pin driver 1

#3. The argument in inst/pin format
get_conns("U187/A")
U294 A1 pin load 1
U187 A pin load 1
U80 Y pin driver 1

#4. Return connections count
get_conns("U187/A", "-count");
3

#5. Return load only and in pin format
get_conns("U187/A", "-pin", "-load");
U294/A1
U187/A

get_coord

Get an instance's coordination
Usage:
my ($x, $y) = get_coord($instance);
$instance: Instance name

Examples:
my ($x, $y) = get_coord("xbar/U1234");
# $x=100, $y=200 in um

get_definition

Get instantiation of instance
Usage:
my $line = get_definition($inst);
$inst: Instance name.
$line: The instantiating line
Examples:
get_definition('U78');
Returns "AND2X1 U78(.A(n1), .B(n2), .Z(n3));"

get_driver

Get the driver of a net or pin
Usage:
@driver = get_driver($point, @options);
$point: net name or pin name, 'n12345' or 'U12345/A1'
@options:
   -pin: Return in "inst/pin" format, E.G. "state_reg/Q"
         Return an array if '-pin' is not present
@driver: The driver in array format, if '-pin' is not present.
         If the point is floating, @driver is empty, 
         Index 0: instance, it will be empty if the driver is port
         Index 1: pin or port name, if the driver is a port, it has the port name
         Index 2: string "pin" or "port" depending on the driver is port or leaf cell
         
Note:
1. If '-pin' is present, return a scalar, $driver = get_driver("n12345", "-pin");
2. Use 'get_drivers' if there are multiple drivers, the return data has different structure

Examples:
#1. 
@driver = get_driver("net12345");
@driver has content of ("U1247", "Y", "pin");

#2. port_abc is input port
@driver = get_driver("port_abc"); 
@driver has content of ("", "port_abc", "port");
           
#3. Get pin format
$driver = get_driver("net12345", "-pin");
$driver has content of "U1247/Y"

get_drivers

Get the drivers of a net or pin
Usage:
@drivers = get_drivers($point, @options);
$point: net name or pin name, 'n12345' or 'U12345/A1'
@options:
   -nonbuf: Trace the drivers until none buffer 
@drivers: An array of the drivers, if the point is floating, @drivers is empty, 
         if the point has mulit-drivers, @drivers has more than one items.
         For each item in @drivers
         Index 0: instance, it will be empty if the driver is port
         Index 1: pin or port, if the driver is port, return port
         Index 2: string "pin" or "port" depending on the driver is port or leaf cell
         If 'nonbuf' is present, the last item in @drivers is the non-buffer driver
         So '$nonbuf = pop @drivers' can get the non-buffer driver 
Note:
Use 'get_driver' instead if the net has only one driver and 'nonbuf' option is not used

Examples:
#1.
@drivers = get_drivers("net12345");
@drivers has content of (["U1247", "Y", "pin"]);

#2. port_abc is input port
@drivers = get_drivers("port_abc"); 
@drivers has content of (["", "port_abc", "port"]);
   
#3. Buffers in the path
@drivers = get_drivers("state_reg/CK", "-nonbuf");
@drivers has content of
(
 ["buf_inst0", "Y", "pin"],
 ["buf_inst1", "Y", "pin"],
 ["and_inst2", "Y", "pin"]
)


        

get_instance

Get instance in the top level module
Usage:
my $instance = get_instance($pattern, @options);
$pattern: Match pattern, can have wildcard "*", if it is empty, it will be treated as "*"
@options:
    -module: module name to have its instance name found
$instance: Return the first instance matching

Examples:
$instance = get_instance("ui_*");   # The fist hierarchical instance matching 'ui_*'.
$instance = get_instance("-module", "enet_control");         # Find the instance name of module 'enet_control' 

get_instances

Get all hierarchical instances in the top level module
Usage:
my @instances = get_instances($pattern);
$pattern: Match pattern, can have wildcard "*", if it is empty, it will be treated as "*"

@instances: Array of the hierarchical instances

Examples:
@instances = get_instances("UI_*"); # Any hierarchical instances with UI_ as prefix.
@instances = get_instances;         # All hierarchical instances. 

get_leaf_pin_dir

Get leaf cell pin's direction input/output/inout
Usage:
my $dir = get_leaf_pin_dir("$leaf_name/$pin");
$pin: pin name, E.G.  A or B or Y
$leaf: Leaf cell name, E.G. NAND2X2
$dir: return direction, input/output/inout
Examples:
my $dir = get_leaf_pin_dir("NAND2X2/A");

get_leafs_count

Get all leaf cells name and count in the top level module, return an array 
Usage:
@leaf_count = get_leafs_count;
@leaf_count: Arrary of leaf name and count
 ( [leaf0, cnt0], [leaf1, cnt1], ...)

Examples:
@leaf_count = get_leafs_count;
foreach my $leaf_point (@leaf_count){
   my $leaf_name = $leaf_point->[0];
   my $count = $leaf_point->[1];
   print "LEAF: $leaf_name has $count cells\n";
}

get_lib_cells

Get leaf gates in libraries 
Usage:
my @cells = get_lib_cells($pattern, @options);
@options:
     -help:            This information
     -char:            All cells characterization
     -type leaf_type:  Get leaf gates matching type. 
                       Leaf_type can be 'ff', 'latch', 'cg', 'buf', 'not', 'and' ...
     -type_info:       List all types in the current loaded libraries
     -verbose:         If $pattern matchs only one lib cell, print the cell lib information
$pattern: Library cell name pattern, can have '*'.
@cells: Return array with name matching

get_loads

Get loads of net or pin in the top level module, return the leafs connections
Usage:
@result = get_loads($net_or_pin, @options);
$net_or_pin: The net name or pin name that needs to get fanouts.
@options:
   -nonbuf: Trace the loads until none buffer 
   -bypbuf: Don't include buffer/inverter in the return array
@result: a two dimension array
          instance, port_name, pin_or_port, load_or_driver, is_it_a_leaf, 
@result = ([instance_0, pin_0],
           [instance_1, pin_1],
           ...
          )

get_logic_cone

Get logic cone of nets or pins
Usage:
$result = get_logic_cone(@InstancePinList, @options);
@InstancePinList: Instance/pin and net list. 
$result: 1, the command fails. 0, the command completed successfully
@options:
    -o file_name: Write output to the file. Default logic_cone.v

Examples:
my @InstPin = ('abc_reg/D', 'n12345');
my $ret = get_logic_cone(@InstPin, '-o', 'MyLogicCone.v');
# The logic cone is written out to verilog file 'MyLogicCone.v'

get_match_nets

Get logic equivalent nets in implementation netlist
Usage:
my @nets = get_match_nets($reference_net);
$reference_net: Net name in reference netlist
@nets: Equivalent nets in implementation netlist

get_modules

Get all hierarchical modules under current module
Usage:
@modules = get_modules($pattern, @options);
$pattern: Match pattern, can have wildcard "*", if it is empty, it will be treated as "*"
@options:
    -help: Print out this information
    -hier: Or -h, do the command hierarchically
@modules: Modules list, ("module0", "module1", ...)

Examples:
@modules = get_modules("*TM*");  # Any hierarchical modules with TM in the name.
@modules = get_modules;          # All hierarchical modules.
@modules = get_modules("-hier"); # All hierarchical modules and sub-modules under current module.

get_net_of

Get the net name connecting to the pin
Usage:
my $net = get_net_of($pin);
$pin: The pin of the instance, 'U1234.A1' or 'U1234/A1' 
$net: The net name connecting to the pin

get_nets

Get nets that matching pattern
Usage:
@nets = get_nets($pattern, @options);
$pattern: The net naming pattern, "*" or empty for all nets
@options:;
   -const0: Get all constant zero nets
   -const1: Get all constant one nets
@nets: returned net array.

Examples:
1#. Get all nets.
@nets = get_nets("*"); 
2#. All nets with dbuffer as prefix 
@nets = get_nets("dbuffer_*"); 
3#. Get constant nets
@nets = get_nets("-const"); 

get_path

Get current hierarchical path
Usage:
$path = get_path();
$path: The current path

get_pins

Get pins of instance or module
Usage:
@pins = get_pins($name, @options);
$name: The instance or module name, it can be hierarchical or leaf
@options:
    -input: Get input pins
    -output: Get output pins
    -inout: Get inout pins
    -clock: Get clock pin, only valid for sequencial cell, flop latch and gated-clock-cell
    -reset: Get reset pin, return "" if it doesn't exist
    -set:   Get set pin, return "" if it doesn't exist
    -data: Get data pins
    -attribute attribute: Get pins with the attribute
    -nextstate_type type: Get pins matching the type 
            which can be 'data', 'load', 'scan_in', 'scan_enable'
            This option is only valid for sequencial cell, flop, latch and gated-clock-cell
If no option is present, get all pins
@pins: All pins returned, in 'instance/pin' format

Examples:
my @pins = get_pins("-input", "u_abc/U123");
Result @pins = ("u_abc/U123/A", "u_abc/U123/B")

@pins = get_pins("AND2X2");
Result @pins = ("A","B","Y") 

get_ports

Get all ports in the current top level module
Usage:
@matching_ports = get_ports($pattern, @options);
$pattern: Match pattern, can have wildcard "*". If it is empty, it will be treated as "*"
@options:
          -input: Get input ports only
          -output: Get output ports only
          -inout: Get inout ports only
          -bus: Get ports in bus format instead of bit blast. 
                The API returns an array point if this option present
                The item in the array has format of [port, IsBus, MaxIndex, MinIndex]
                if IsBus == 1, MaxIndex is the Max Index of the bus, E.G, 7 if the bus is port_a[7:0]
                if ISBus==0, MaxIndex and MinIndex are not defined
  
If no option is prsent, get all ports

@matching_ports: Return ports matching the pattern and the option specified in 
                  the current top level module

Examples:
@ports = get_ports("-input", "dsp2mc_*");  # Get input ports with "dsp2mc_" as prefix
@ports = get_ports;                       # Get all ports

get_ref

Get the reference of the instance, return leaf cell name or hierarchical module name 
Usage:
$reference = get_ref($instance);
$instance: Instance name, "U123"
$reference: Return reference name, "NAND2X4" 

get_resolved

Resolve the relative path to module and leaf item
Usage:
($module, $leaf) = get_resolved($relative_path);
$relative_path: Relative path, like "u_abc/u_def/U456"
$module: Resolved module name, like "def"
$leaf: Resolved leaf name, like U456

Examples:
my ($module, $leaf) = get_resolved("u_abc/u_def/U456");
$module has value "def"
$leaf has value "U456"

get_roots

Get root designs name
Usage:
my @rootdesigns = get_roots;
@rootdesign: returned root designs name

get_spare_cells

ECO command. Get spare cells
Usage:
get_spare_cells($pattern,@options);
$pattern: Spare leaf cell instance pattern, E.G. 'spare_inst*/spare_gate*'
          Extract spare cells from the database with the pattern
          The first half before '/' is hierarchical instance pattern, it is '*' for top level
          The second half after '/' is leaf instance pattern
          It is ignored if -file option is present
@options:
    -o file_name: Write updated spare cell list to the file, by default, it has name 'spare_cells_scriptname.list'
    -file spare_list_file: Load in spare cell list file instead of extracting from the database

Examples:
#1. Extract spare cells from the database, matching instances like "SPARE_u0"
get_spare_cells("*/SPARE_*");   
#2. Matching hierarchical instance "someSpare_*" and leaf instance "spr_gate*"
get_spare_cells("someSpare_*/spr_gate*"); 
#3. Extract spare cells from file "spare_cells_list.txt"
get_spare_cells("-file", "spare_cells_list.txt"); 

gexit

Exit the GofCall interactive mode
Usage:
gexit;
 

gprint

Print out the message and save to log file
Usage:
gprint($info);
$info: message to be printed.

is_leaf

Check if a module or instance is leaf cell
Usage:
my $leaf = is_leaf($name);
$name: The module or instance under check
$leaf: 0, it's a hierarchical module, (Or the module is not defined)
       1, it's leaf cell. Like, NAND4X8

is_seq

Check if a leaf module is a specific sequencial cell
Usage:
my $isseq = is_seq($name, @options);
$name: The leaf module under check
@options:
    -help:  This information
    -ff:    Check if it's flipflop
    -latch: Check if it's latch
    -cg:    Check if it's gated clock
$isseq: 0, it is not the specific sequencial cell
        1, it is the specific sequencial cell

lv_search

Search instances in LayoutViewer window
Usage:
my $ret = lv_search($pattern, @options);
$pattern: The pattern matching instance name, '*', 'u_spare*/U*'  
@options:
    -help: Print out this information
    -spare: Unused spare cells only

map_spare_cells

ECO command. Map all new created cells to spare cells
Usage:
map_spare_cells;
@options:
    -help: Print out this information.
    -syn Synthesis-command-line: 
            By default, a built-in Synthesis Engine is used.
            External Synthesis tool can be picked by this option
            RTL Compiler and Design Compiler are supported. 
            E.G. "map_spare_cells('-syn', 'rc')" to pick RTL compiler
                 "map_spare_cells('-syn', 'dc_shell')" to pick Design Compiler 
            User can speficy more values in the synthesis command
            E.G. '-rc', "rc -E -use_lic RTL_Compiler_Physical"
    -nofreed: Dont add freed gates for synthesis. 
    -nobuf: Dont insert buffers/repeaters in long wires. 
    -notielow: Dont tie low of the input pins of output floating gates, delete them instead
    -pause: Pause the tool before apply the patch
    -exact: Map to the exact name of spare cell, by default the tool picks up a spare cell with 
            the same function, for example, pick up 'INVX2' for 'INVX4'
Note:
A DEF file is needed for mapping to exact spare instances.
Examples:
#1. Map to spare cells and use the built-in Synthesis Engine
map_spare_cells;
#2. Use extra 'rc' option
map_spare_cells('-syn', "rc -E -use_lic RTL_Compiler_Physical")
#3. Dont add freed cells for synthesis
map_spare_cells('-syn', "rc -E -use_lic RTL_Compiler_Physical", "-nofreed")

new_gate

ECO command. Create new gate
Usage:
@return = new_gate($new_net, $reference, $new_instance, $connections);
Note:
if the command is called in the context of return a scalar, the new created instance name
        will returned back. 
      The usage is the same as new_net, except $reference has to be defined, 
        and return back instance if scalar present.
      Run "help new_net" for detail in shell "GOF >"

new_net

ECO command. Create a new net
Usage:
@return = new_net($new_net, $reference, $new_instance, $connections);
$new_net: The new net to be created, if not defined, the tool will assign one automatically
$reference: The leaf gate name to drive the net.
$new_instance: The instance name the new cell will have. Automatically assigned a name if left empty.
$connections: The new gate input pins connections 
   Supported formats, 1. Detail format:  ".A(net0),.B(net1),.C(net2)"
                      2. Simple format: Connect to the pins in alphabical sequence 
                          "net1,net0,net2" indicating .A(net1),.B(net0),.C(net2)
                      3. Mixed format: "instance/pin" and net, "U408/Y,U409/Y,net2" indicating 
                          A to U408/Y, B to U409/Y and C to net2
                      4. The "instance/pin" can have sub-instance hierarchy, "u_abc/U408/Y"
@return: Have the new created instance and net name.
$return[0] : New created instance.
$return[1] : New created net.

Note:
Hierarchical path is supported in any net or instance in the command, 
         for instance, new_net('u_abc/net124', ...
      If the command is called in the context of return a scalar, the new created net name will returned. 
      The new net is assumed to be driven in the path it is created, 
         for instance, new_net('u_abc/eco12345_net124');
      eco12345_net124 should be driven in sub-instance u_abc after it is created.

Examples:
#1. NAND2x2 instance name 'U_eco_123' driving new net 'net123'
new_net("net123", "NAND2X2", "U_eco_123", ".A(n200),.B(n201)");  

#2. INVX2 with instance name 'U_inv' is created in u_abc sub-instance
#  and the input pin of the new invert is driven by n200 in current top level
#  port would be created if n200 doesn't drive input port to u_abc
new_net("u_abc/net123", "INVX2", "u_abc/U_inv", "n200"); 

#3. Create a new net "net500"
new_net("net500");  
 
#4. Create a new instance with new net tied to output pin, input pin is floating.
# $return[0] is new created instance, $return[1] is new created net.
@return = new_net("", "INVX2", "", ""); 

new_port

ECO command. Create a new port for the current top level module
Usage:
new_port($name, @options);
$name: Port name
@options:
    -input: New an input port
    -output: New an output port
    -inout: New an inout port

Note:
The port name has to be pure words or with bus bit, like, abc[0], abc[1]

Examples:
new_port('prop_control_en', '-input');  # create an input port naming 'prop_control_en'
new_port('prop_state[2]', '-output');   # create an output port with bus bit 'prop_state[2]'
new_port('prop_state[3]', '-output');   # create an output port with bus bit 'prop_state[3]'

place_gate

ECO command. Place gate position
Usage:
place_gate($inst, $x, $y);
$inst: The instacne to be placed
$x,$y: The coordinate

Note:
This command affects the spare gate mapping of the instance.
Examples:
# A flop is added and placed in some location
# In 'map_sparee_cells' command, the flop is mapped to a spare flop closest to the location
change_pin("U123/A", "DFFX1", "eco_dff_reg", ".D(-),.CK(clock)");
place_gate("eco_dff_reg", 100, 200); # location, 100um, 200um
map_spare_cells;

place_port

ECO command. Place port position
Usage:
place_port($port, $x, $y);
$port: The port to be placed
$x,$y: The coordinate
This command has effect on change_port ECO command

pop_top

Pop out the saved top level module from the stack and discard the current setting
Usage:
pop_top;

push_top

Set the current top level module and push the previous setting to stack, pop_top can retrive it
Usage:
push_top($module);
$module: Set the $module as the top level module, push the previous settting to the stack

read_def

Read DEF file
Usage:
my $status = read_def(@files);
@files:  DEF files
$status: If zero, the files are read in successfully
         if one, failed to read in the files

Examples:
my $status = read_def("soc_top.def");  # Read in soc_top.def 
my $status = read_def("soc_top1.def", "soc_top2.def");  # Multiple DEF files

read_design

Read verilog netlist
Usage:
my $status = read_design(@files, @options);
@files: Verilog netlist files
@options:
    -imp: The netlists are implementation design
    -ref: The netlists are reference design
    -Top_1: Read design to create Top_1 tree database
    -Top_2: Read design to create Top_2 tree database
    -once: Read the file only once, the file will be bypassed if the command is executed again
Note:
If no -imp or -ref option is provided, the netlist is assumed 'implementation'
$status: If zero, the file is read in successfully
         if one, failed to read in the file

Examples:
my $status = read_design("-imp", "soc_design_resynthesized.gv");
my $status = read_design("-ref", "soc_design_released.gv");
my $status = read_design("-ref", "soc_design_released.gv", "soc_io.gv");

read_file

Read timing violation report file
Usage:
my $status = read_file($file_name, @options);
$file_name: file name
@options:
    -format format: accu/pt
                    accu --- Accucore report file. 
                    pt   --- Prime Time report file
$status: If zero, the file is read in successfully
         if one, failed to read in the file

Examples:
my $status = read_file("soc_primetime_hold.report", "-format", "pt"); 

Note:
Prime Time timing report file should be generated by report_timing command with these options
      report_timing -nosplit -path_type full_clock_expanded -delay max/min -input_pins \
                    -nets -max_paths 10000 -transition_time -capacitance

read_lef

Read LEF file
Usage:
my $status = read_lef(@files);
@files:  LEF files
$status: If zero, the files are read in successfully
         if one, failed to read in the files

Examples:
my $status = read_lef("soc_top.lef");  # Read in soc_top.lef 
my $status = read_lef("soc_top.lef", "soc_top1.lef", "soc_top2.lef");  # Read in multiple LEF files 

read_library

Read stardard library or verilog library files
Usage:
my $status = read_library(@files, @options);
@options:
   -v: Treat the @files as verilog library files
   -lib: Treat the @files as stardard library files
@files: Stardard library files, or verilog library files

Note:
If the file has .lib extension, '-lib' can be omitted, and it is treated as stardard library file
      If the file has .v or .vlib extenstion, '-v' can be omitted, and it is treated as verilog file
$status: If zero, the file is read in successfully
         if one, failed to read in the file
Examples:
my $status = read_library("arm_40_hvt.lib", "arm_40_io.lib");
my $status = read_library("macro.v", "macro2.vlib");
my $status = read_library("-v", "macro.gv");
   

rename_net

ECO command. Rename a net name
Usage:
rename_net($oldname, $newname);
$oldname: Old net name
$newname: New net name

report_eco

Report ECO
Usage:
report_eco($filename);
If $filename is not present, print to screen

report_spares

Report Spare cells

Usage:
report_spares;

run

Run GofCall script
Usage:
run($script_name);

Examples:
run("eco2.pl");

sch

Launch schematic to verify ECO
Usage:
sch(@instances, @options);
@instances: Instances or nets in the current module to be displayed on the schematic
@options:
    -set value: Set a value when launch the schematic
    -to value: To existing schematic
Examples:
sch("U123", "U456", "inst0");
sch("clk")
sch("in1", "-set", "1");
sch("in1", "-to", "1"); # No action if schematic 1 doesn't exist

set_exit_on_error

Whether the tool should exit when the script runs into an error
Usage:
set_exit_on_error($error, $bit);
$error: Error pattern, wild card support. 'E-001', 'E-*'
$bit: 1, Exit on the error, default
      0, Don't exit on the error

set_exit_on_warning

Whether the tool should exit when the script runs into a warning
Usage:
set_exit_on_warning($warning, $bit);
$warning: Warning pattern, wild card support. 'W-001', 'W-*'
$bit: 1, Exit on the warning
      0, Don't exit on the warning, default

set_invert

Set invert type. The tool will automatically pick one if the command is not called
Usage:
set_invert($invert);
$invert: Lib cell name for invert
Examples:
set_invert("INVX2");

set_keep_format

Set keep format of the original verilog when ECO is done
Usage:
set_keep_format($value);
$value: 0: disable, 1 : enable.

set_leaf

Set a hierarchical module to be leaf. Useful to stub hierarchical instances.
Usage:
set_leaf($module_name, $value);
$module_name: The module to be set leaf or not set to leaf
$value: 1 or larger than 1, set the module as leaf. 0 not set to leaf. 
        If $value is not present, the default value is 1.

Examples:
set_leaf($module_a); # set $module_a as a leaf
set_leaf($module_a, 1); # same as the above
set_leaf($modeul_a, 0); # remove the leaf setting

set_log_file

Set log file name
Usage:
set_log_file($filename);
$filename: Log file name

set_max_lines

Set max output lines
Usage:
set_max_lines($num);
$num: New max lines number. Default to be 500

set_max_loop

Setup max loop, GOF stops logic optimization when max loop number is reached
Usage:
set_max_loop($value);

$value: Setup BDD threshold, default 40000

set_mod2mod

Set reference module mapping to implementation module
Usage:
set_mod2mod($refmod, $impmod);
$refmod: The reference module name
$impmod: The implementation module name
Note:
The command is used when reference netlist is partial

set_mu

MU configuration, setup MU value for BDD threshold
Usage:
set_mu($value);
$value: Setup BDD threshold, default 12000

set_power

Set power pins connections for leaf cell
Usage:
set_power($leaf_cell, $connections);
$leaf_cell: Leaf cell name. Like NAND2X4
$connections: Power pins connections, like ".GND(GND),.VDD(VDD)"

set_preserve

Set preserve property on instances. The tool will not remove them in ECO
Usage:
set_preserve(@instances);
@instances: Instances to be preserved in the current module
            Accept wild card '*'
Examples:
set_preserve("u_donttouch0", "u_1000");
set_preserve("DONT*");

set_quiet

Run script in quiet mode
Usage:
set_quiet;

set_tiehi_net

Set tiehi net name, it will be used if tiehi net is needed in ECO
Usage:
set_tiehi_net($netname);
$netname: Tiehi net name, E.G. '___logic1___'

set_tielo_net

Set tielo net name, it will be used if tielo net is needed in ECO
Usage:
set_tielo_net($netname);
$netname: Tielo net name, 
Examples:
set_tielo_net("___logic0___");
set_tielo_net("TIE_HILO_TIELO_NET");

set_top

Set the current top level module
Usage:
set_top($module);
$module: Set $module as the current top level module.
         If the argument is missing, return the current setting
         ".." set to parent module
Note:
It can be reset to the root top module by 'undo_eco'

set_tree

Set the current tree, if there are more than one sets of databases
Usage:
set_tree($tree);
$tree: It can be the default tree 'Top'.
       Or 'Top_1' if you use -Top_1 option to load in other design
       Or Top_ref in when using read_design("-ref", reference_netlist)
       If $tree is not defined, the current database name is returned

Note:
Implementation tree 'Top' has aliases of 'imp', 'IMP'
      Reference tree 'Top_ref' has aliases of 'ref', 'REF'

Examples:
set_tree("Top");
set_tree("IMP"); # Same as the above
set_tree("Top_ref"); # Set to reference tree
set_tree("ref"); # Same as the above, set to reference tree
set_tree();  # Return the current database name. E.G. 'Top_ref'

set_verbose

Run script in verbose mode
Usage:
set_verbose;

setup_eco

ECO command. Setup ECO
Usage:
setup_eco($eco_name, @options);
$eco_name: ECO name, like eco01234
@options:
    -help: Print out this information.
    -comments comments: Comments to appear at the beginning of ECO netlist.

Examples:
#1. Setup ECO name 
setup_eco('eco1234')
#2. Setup ECO name with comments
setup_eco('eco1234', '-comments', 'Fix abc_state state machine');

start_gui

Start GUI windows
Usage:
start_gui;

stitch_scan_chain

ECO command. Stitch scan chain
Usage:
stitch_scan_chain($inst);
$inst: The instance name to stitch in all new flops scan chain. 
       Create a new sub-scan-chain for the all new flops, break the chain connecting the instance, 
         and stitch in the new sub-scan-chain 

undo_eco

ECO command. Undo eco operations, restore database to the orignial state.
Usage:
undo_eco();

write_dcsh

ECO command. Write out ECO result in Design Compiler dcsh script format
Usage:
write_dcsh($dc_script_name);
$dc_script_name: Synopsys Design Compiler dcsh script name.
Examples:
write_dcsh("eco12345.dcsh");

write_soce

ECO command. Write out ECO result in Cadence SOC Encounter script format
Usage:
write_soce($soc_encounter_script_name);
$soc_encounter_script_name: Cadence SOC Encounter script name.
Examples:
write_soce("eco12345.soce");

write_spare_file

ECO command. Write out spare cells list file
Usage:
write_spare_file($filename);
$filename: Spare cells file name to be written out
Note:
Any used spare cell has '#' in the start of the line

write_tcl

ECO command. Write out ECO result in Design Compiler tcl script format
Usage:
write_tcl($tcl_script_name);
$tcl_script_name: Synopsys Design Compiler tcl script name.
Examples:
write_tcl("eco12345.tcl");

write_verilog

ECO command. Write out ECOed netlist to a file
Usage:
write_verilog($verilog_file, @options);
@options:
    -help: Print out this information
    -all:  Keep the modules in the netlist file even they are not the sub-modules of the top module
$verilog_file: Write out verilog file name, should be different from existing netlist file name.

Note:
When the design is read in by multiple netlist files, set_top command should be used to 
      make the correct file saved out
      
Examples:
#1. The design is read in by 'gof -lib tsmc.lib ethernet_top.v'
#   After ECO, to write out ECO netlist use command 
write_verilog("ethernet_top_eco.v");

#2. The design is read in by multiple netlist files, 
#   'gof -lib tsmc.lib mem_control.v dsp.v ethernet_top.v'
#   The ECO is done on 'mem_control' module, to save the netlist
set_top("mem_control");
write_verilog("mem_control_eco.v");

#3. The design is read in by 'gof -lib tsmc.lib ethernet_top.v', 
#    ethernet_top.v has 'mem_control' and 'dsp' sub-modules
#   The following commands will only write out 'mem_control' and its sub-modules
set_top("mem_control");
write_verilog("ethernet_top_eco.v");
 
#4. The design is read in by 'gof -lib tsmc.lib ethernet_top.v'.
#    ethernet_top.v has 'mem_control' and 'dsp' sub-modules
#   The following commands will write out all modules in ehternet_top.v
set_top("mem_control");
write_verilog("ethernet_top_eco.v", "-all");
 
#5. The design is read in by 'gof -lib tsmc.lib ethernet_top.v'.
#    ethernet_top.v has 'mem_control' and 'dsp' sub-modules
#   The following commands will write out all modules in ehternet_top.v
set_top("ethernet_top");
write_verilog("ethernet_top_eco.v");