NanDigits Design Automation

We work with very large SOC chips with multi-million gates. GOF has allowed us to surgically perform ECOs to fix timing and functional errors and get chip out faster.

   --- Ramana Rao, Director of Engineer in Nethra Imaging

I truly like the tool. Good Software and good support.

   --- Kan Chu, Project Lead of Digital ASIC Design in Kionix Inc.

I am an early adopter of GOF and have always been impressed with the intuitive ease of use, functionality and stability.  The support is stellar -always nice to work with a smaller company but NanDigits is phenomenal: When I suggested a nice-to-have feature they turned it around in less than two weeks!  I use it for ECOs as well as incidental gate-level analysis during STA and gate-level simulation, etc. and haven't even tapped in to all the features.  I am so pleased that support for this outstanding tool continues.
 
   ---Thomas C. Jones, ASIC Architect in Echelon Corporation