module ETOP(/*AUTOARG*/ // Outputs HEEN_OPS_RXDIG, HEEN_OPS_RXWHTH, HEEN_OPS_JSDSJUL, pin_sout1, pin_sout14, pin_sout19, pin_sout2, pin_sout23, pin_sout24, pin_sout25, pin_sout26, pin_sout27, pin_sout28, pin_sout29, pin_sout3, pin_sout30, pin_sout31, pin_sout32, pin_sout33, pin_sout34, pin_sout35, pin_sout36, pin_sout37, pin_sout4, pin_sout5, pin_sout6, pin_sout7, pin_sout9, PROCESS_VALUE, LVSEL_RXDIG, LVSEL_JSDSJUL, LVSEL_TXCLK, LVSEL_TXSUJUJU, LVSEL_TXDRV, LVSEL_TXWHTH, ops_cal_zzeddr_start, LVSEL_RXWHTH, // Inputs MNI_IDLE, HIOPSR, pin_scan_en, pin_sin1, pin_sin12, pin_sin13, pin_sin14, pin_sin17, pin_sin2, pin_sin22, pin_sin23, pin_sin24, pin_sin25, pin_sin26, pin_sin27, pin_sin28, pin_sin29, pin_sin3, pin_sin30, pin_sin31, pin_sin32, pin_sin33, pin_sin34, pin_sin35, pin_sin36, pin_sin4, pin_sin5, pin_sin6, pin_sin7, pin_sin8, cal_zzeddr_done, ext_mmslv_rxdig, ext_mmslv_rxintp, ext_mmslv_jsdsjul, ext_mmslv_txclk, ext_mmslv_txsujuju, ext_mmslv_txdrv, ext_mmslv_txintp, exten_mmslv_rxdig, exten_mmslv_rxintp, exten_mmslv_jsdsjul, exten_mmslv_txclk, exten_mmslv_txsujuju, exten_mmslv_txdrv, exten_mmslv_txintp, exten_guoche_rxdig, exten_guoche_rxintp, exten_guoche_jsdsjul, exten_guoche_txclk, exten_guoche_txsujuju, exten_guoche_txdrv, exten_guoche_txintp, fm_ana_sq_out, zzeddr_in, micho_1m, ref_clk, jcq_cal_ops_calen_rxdig, jcq_cal_ops_calen_rxintp, jcq_cal_ops_calen_jsdsjul, jcq_cal_ops_calen_txclk, jcq_cal_ops_calen_txsujuju, jcq_cal_ops_calen_txdrv, jcq_cal_ops_calen_txintp, jcq_cal_ops_hsdlfuous_mode, jcq_cal_ops_freeze_hsdlfuous, jcq_cal_ops_zzeddr_rerun_en, jcq_cal_ops_zzeddr_value_default, jcq_cal_ops_zzeddren_tx, jcq_cal_ops_zzeddren_tx_force, jcq_cal_ops_speed, jcq_force_no_pause_hsdlfuous, jcq_force_no_skip_hsdlfuous, jcq_ops_cal_read, reset, slew_ctrl_en, to_mni_pll_clk_ready, to_mni_lq_ivref, to_mni_lq_pll, to_mni_lq_rx, to_mni_lq_tx, to_mni_lq_tx_intp, to_mni_ssc_en, ops_cal_start ); ///*AUTOINPUT*/ // Beginning of automatic inputs (from unused autoinst inputs) input MNI_IDLE; // To uvcal of ops_cal_ctrl_1.v input HIOPSR; // To uvcal of ops_cal_ctrl_1.v input pin_scan_en; // To uvcal of ops_cal_ctrl_1.v, ... input pin_sin1; // To uvcal of ops_cal_ctrl_1.v input pin_sin12; // To uvcal of ops_cal_ctrl_1.v input pin_sin13; // To uvcal of ops_cal_ctrl_1.v input pin_sin14; // To uvcal of ops_cal_ctrl_1.v input pin_sin17; // To uvcal of ops_cal_ctrl_1.v input pin_sin2; // To uvcal of ops_cal_ctrl_1.v input pin_sin22; // To uvcal of ops_cal_ctrl_1.v input pin_sin23; // To uvcal of ops_cal_ctrl_1.v input pin_sin24; // To uvcal of ops_cal_ctrl_1.v input pin_sin25; // To uvcal of ops_cal_ctrl_1.v input pin_sin26; // To uvcal of ops_cal_ctrl_1.v input pin_sin27; // To uvcal of ops_cal_ctrl_1.v input pin_sin28; // To uvcal of ops_cal_ctrl_1.v input pin_sin29; // To uvcal of ops_cal_ctrl_1.v input pin_sin3; // To uvcal of ops_cal_ctrl_1.v input pin_sin30; // To uvcal of ops_cal_ctrl_1.v input pin_sin31; // To uvcal of ops_cal_ctrl_1.v input pin_sin32; // To uvcal of ops_cal_ctrl_1.v input pin_sin33; // To uvcal of ops_cal_ctrl_1.v input pin_sin34; // To uvcal of ops_cal_ctrl_1.v input pin_sin35; // To uvcal of ops_cal_ctrl_1.v input pin_sin36; // To uvcal of ops_cal_ctrl_1.v input pin_sin4; // To uvcal of ops_cal_ctrl_1.v input pin_sin5; // To uvcal of ops_cal_ctrl_1.v input pin_sin6; // To uvcal of ops_cal_ctrl_1.v input pin_sin7; // To uvcal of ops_cal_ctrl_1.v input pin_sin8; // To uvcal of ops_cal_ctrl_1.v input cal_zzeddr_done; // To uvcal of ops_cal_ctrl_1.v input [4:0] ext_mmslv_rxdig; // To uvcal of ops_cal_ctrl_1.v input [4:0] ext_mmslv_rxintp; // To uvcal of ops_cal_ctrl_1.v input [4:0] ext_mmslv_jsdsjul; // To uvcal of ops_cal_ctrl_1.v input [4:0] ext_mmslv_txclk; // To uvcal of ops_cal_ctrl_1.v input [4:0] ext_mmslv_txsujuju; // To uvcal of ops_cal_ctrl_1.v input [4:0] ext_mmslv_txdrv; // To uvcal of ops_cal_ctrl_1.v input [4:0] ext_mmslv_txintp; // To uvcal of ops_cal_ctrl_1.v input exten_mmslv_rxdig; // To uvcal of ops_cal_ctrl_1.v input exten_mmslv_rxintp; // To uvcal of ops_cal_ctrl_1.v input exten_mmslv_jsdsjul; // To uvcal of ops_cal_ctrl_1.v input exten_mmslv_txclk; // To uvcal of ops_cal_ctrl_1.v input exten_mmslv_txsujuju; // To uvcal of ops_cal_ctrl_1.v input exten_mmslv_txdrv; // To uvcal of ops_cal_ctrl_1.v input exten_mmslv_txintp; // To uvcal of ops_cal_ctrl_1.v input exten_guoche_rxdig; // To uvcal of ops_cal_ctrl_1.v input exten_guoche_rxintp; // To uvcal of ops_cal_ctrl_1.v input exten_guoche_jsdsjul; // To uvcal of ops_cal_ctrl_1.v input exten_guoche_txclk; // To uvcal of ops_cal_ctrl_1.v input exten_guoche_txsujuju; // To uvcal of ops_cal_ctrl_1.v input exten_guoche_txdrv; // To uvcal of ops_cal_ctrl_1.v input exten_guoche_txintp; // To uvcal of ops_cal_ctrl_1.v input fm_ana_sq_out; // To uvcal of ops_cal_ctrl_1.v input [3:0] zzeddr_in; // To uvcal of ops_cal_ctrl_1.v input micho_1m; // To uvcal of ops_cal_ctrl_1.v input ref_clk; // To uvcal of ops_cal_ctrl_1.v input [1:0] jcq_cal_ops_calen_rxdig;// To uvcal of ops_cal_ctrl_1.v input [1:0] jcq_cal_ops_calen_rxintp;// To uvcal of ops_cal_ctrl_1.v input [1:0] jcq_cal_ops_calen_jsdsjul;// To uvcal of ops_cal_ctrl_1.v input [1:0] jcq_cal_ops_calen_txclk;// To uvcal of ops_cal_ctrl_1.v input [1:0] jcq_cal_ops_calen_txsujuju;// To uvcal of ops_cal_ctrl_1.v input [1:0] jcq_cal_ops_calen_txdrv;// To uvcal of ops_cal_ctrl_1.v input [1:0] jcq_cal_ops_calen_txintp;// To uvcal of ops_cal_ctrl_1.v input jcq_cal_ops_hsdlfuous_mode;// To uvcal of ops_cal_ctrl_1.v input jcq_cal_ops_freeze_hsdlfuous;// To uvcal of ops_cal_ctrl_1.v input jcq_cal_ops_zzeddr_rerun_en;// To uvcal of ops_cal_ctrl_1.v input [3:0] jcq_cal_ops_zzeddr_value_default;// To uvcal of ops_cal_ctrl_1.v input [1:0] jcq_cal_ops_zzeddren_tx;// To uvcal of ops_cal_ctrl_1.v input jcq_cal_ops_zzeddren_tx_force;// To uvcal of ops_cal_ctrl_1.v input [1:0] jcq_cal_ops_speed; // To uvcal of ops_cal_ctrl_1.v input jcq_force_no_pause_hsdlfuous;// To uvcal of ops_cal_ctrl_1.v input jcq_force_no_skip_hsdlfuous;// To uvcal of ops_cal_ctrl_1.v input [3:0] jcq_ops_cal_read; // To uvcal of ops_cal_ctrl_1.v input reset; // To uvcal of ops_cal_ctrl_1.v, ... input slew_ctrl_en; // To uvcal of ops_cal_ctrl_1.v //input cshi_so4; // To uvcal of ops_cal_ctrl_1.v //input cshi_so7; // To uvcal of ops_cal_ctrl_1.v input to_mni_pll_clk_ready; // To uvcal of ops_cal_ctrl_1.v input to_mni_lq_ivref; // To uvcal of ops_cal_ctrl_1.v input to_mni_lq_pll; // To uvcal of ops_cal_ctrl_1.v input to_mni_lq_rx; // To uvcal of ops_cal_ctrl_1.v input to_mni_lq_tx; // To uvcal of ops_cal_ctrl_1.v input to_mni_lq_tx_intp; // To uvcal of ops_cal_ctrl_1.v input to_mni_ssc_en; // To uvcal of ops_cal_ctrl_1.v input ops_cal_start; // To uvcal of ops_cal_ctrl_1.v // End of automatics ///*AUTOOUTPUT*/ // Beginning of automatic outputs (from unused autoinst outputs) output HEEN_OPS_RXDIG; // From uvcal of ops_cal_ctrl_1.v output HEEN_OPS_RXWHTH; // From uvcal of ops_cal_ctrl_1.v output HEEN_OPS_JSDSJUL; // From uvcal of ops_cal_ctrl_1.v output pin_sout1; // From uvcal of ops_cal_ctrl_1.v output pin_sout14; // From uvcal of ops_cal_ctrl_1.v output pin_sout19; // From uvcal of ops_cal_ctrl_1.v output pin_sout2; // From uvcal of ops_cal_ctrl_1.v output pin_sout23; // From uvcal of ops_cal_ctrl_1.v output pin_sout24; // From uvcal of ops_cal_ctrl_1.v output pin_sout25; // From uvcal of ops_cal_ctrl_1.v output pin_sout26; // From uvcal of ops_cal_ctrl_1.v output pin_sout27; // From uvcal of ops_cal_ctrl_1.v output pin_sout28; // From uvcal of ops_cal_ctrl_1.v output pin_sout29; // From uvcal of ops_cal_ctrl_1.v output pin_sout3; // From uvcal of ops_cal_ctrl_1.v output pin_sout30; // From uvcal of ops_cal_ctrl_1.v output pin_sout31; // From uvcal of ops_cal_ctrl_1.v output pin_sout32; // From uvcal of ops_cal_ctrl_1.v output pin_sout33; // From uvcal of ops_cal_ctrl_1.v output pin_sout34; // From uvcal of ops_cal_ctrl_1.v output pin_sout35; // From uvcal of ops_cal_ctrl_1.v output pin_sout36; // From uvcal of ops_cal_ctrl_1.v output pin_sout37; // From uvcal of ops_cal_ctrl_1.v output pin_sout4; // From uvcal of ops_cal_ctrl_1.v output pin_sout5; // From uvcal of ops_cal_ctrl_1.v output pin_sout6; // From uvcal of ops_cal_ctrl_1.v output pin_sout7; // From uvcal of ops_cal_ctrl_1.v output pin_sout9; // From uvcal of ops_cal_ctrl_1.v output [3:0] PROCESS_VALUE; // From uvcal of ops_cal_ctrl_1.v output [4:0] LVSEL_RXDIG; // From uvcal of ops_cal_ctrl_1.v output [4:0] LVSEL_JSDSJUL; // From uvcal of ops_cal_ctrl_1.v output [4:0] LVSEL_TXCLK; // From uvcal of ops_cal_ctrl_1.v output [4:0] LVSEL_TXSUJUJU; // From uvcal of ops_cal_ctrl_1.v output [4:0] LVSEL_TXDRV; // From uvcal of ops_cal_ctrl_1.v output [4:0] LVSEL_TXWHTH; // From uvcal of ops_cal_ctrl_1.v output ops_cal_zzeddr_start; // From uvcal of ops_cal_ctrl_1.v // End of automatics output [4:0] LVSEL_RXWHTH; wire [4:0] jcq_rd_ops_results; // From uvcal of ops_cal_ctrl_1.v SIVX4 urefclkinv(.A(ref_clk), .Z(ref_clkinv)); SIVX4 urstinv(.A(reset), .Z(resetb)); /*ops_cal_ctrl_1 AUTO_TEMPLATE( .cshi_so\(.*\)(pin_sout\1), .cshi_si\(.*\)(pin_sin\1), .cshi_se(pin_scan_en), .ref_clk_.*(ref_clk), .ref_clk_cts_0_1(ref_clkinv), .ref_clk_cts_1_1(ref_clkinv), .IN.*(pin_scan_en), .IN0(LVSEL_RXWHTH[0]), .IN1(LVSEL_RXWHTH[1]), .reset(resetb), .IN2(reset), .IN3(reset), .IN4(reset), .IN5(reset), .IN6(reset), .IN7(reset), .IN8(reset), .IN9(reset), .IN10(reset), .IN11(reset), .IN12(reset), .IN13(reset), .IN14(reset), .IN15(reset), .IN16(reset), .IN17(reset), .IN18(reset), .IN19(reset), .IN20(reset), .IN21(reset), .IN22(reset), .IN23(reset), .IN24(reset), .IN25(pin_sout4), .IN26(pin_sout7), );*/ ops_cal_ctrl_1 uvcal(/*AUTOINST*/ // Outputs .HEEN_OPS_JSDSJUL (HEEN_OPS_JSDSJUL), .cshi_so7 (pin_sout7), // Templated .cshi_so6 (pin_sout6), // Templated .cshi_so5 (pin_sout5), // Templated .cshi_so4 (pin_sout4), // Templated .cshi_so3 (pin_sout3), // Templated .cshi_so2 (pin_sout2), // Templated .cshi_so1 (pin_sout1), // Templated .ops_cal_zzeddr_start(ops_cal_zzeddr_start), .HEEN_OPS_TXCLK (HEEN_OPS_TXCLK), .HEEN_OPS_TXSUJUJU (HEEN_OPS_TXSUJUJU), .HEEN_OPS_TXWHTH (HEEN_OPS_TXWHTH), .HEEN_OPS_TXDRV (HEEN_OPS_TXDRV), .HEEN_OPS_RXDIG (HEEN_OPS_RXDIG), .HEEN_OPS_RXWHTH (HEEN_OPS_RXWHTH), .jcq_rd_ops_results(jcq_rd_ops_results[4:0]), .LVSEL_RXWHTH (LVSEL_RXWHTH[4:0]), .LVSEL_JSDSJUL (LVSEL_JSDSJUL[4:0]), .LVSEL_TXDRV (LVSEL_TXDRV[4:0]), .LVSEL_RXDIG (LVSEL_RXDIG[4:0]), .LVSEL_TXWHTH (LVSEL_TXWHTH[4:0]), .LVSEL_TXCLK (LVSEL_TXCLK[4:0]), .LVSEL_TXSUJUJU (LVSEL_TXSUJUJU[4:0]), .PROCESS_VALUE (PROCESS_VALUE[3:0]), .cshi_so23 (pin_sout23), // Templated .cshi_so19 (pin_sout19), // Templated .cshi_so14 (pin_sout14), // Templated .cshi_so9 (pin_sout9), // Templated .cshi_so37 (pin_sout37), // Templated .cshi_so36 (pin_sout36), // Templated .cshi_so35 (pin_sout35), // Templated .cshi_so34 (pin_sout34), // Templated .cshi_so33 (pin_sout33), // Templated .cshi_so32 (pin_sout32), // Templated .cshi_so31 (pin_sout31), // Templated .cshi_so30 (pin_sout30), // Templated .cshi_so29 (pin_sout29), // Templated .cshi_so28 (pin_sout28), // Templated .cshi_so27 (pin_sout27), // Templated .cshi_so26 (pin_sout26), // Templated .cshi_so25 (pin_sout25), // Templated .cshi_so24 (pin_sout24), // Templated // Inputs .cshi_si1 (pin_sin1), // Templated .exten_guoche_jsdsjul(exten_guoche_jsdsjul), .cshi_se (pin_scan_en), // Templated .cshi_si7 (pin_sin7), // Templated .cshi_si6 (pin_sin6), // Templated .cshi_si5 (pin_sin5), // Templated .cshi_si4 (pin_sin4), // Templated .cshi_si3 (pin_sin3), // Templated .cshi_si2 (pin_sin2), // Templated .exten_mmslv_rxintp(exten_mmslv_rxintp), .exten_mmslv_jsdsjul(exten_mmslv_jsdsjul), .exten_guoche_txclk(exten_guoche_txclk), .exten_guoche_txsujuju(exten_guoche_txsujuju), .exten_guoche_txintp(exten_guoche_txintp), .exten_guoche_txdrv(exten_guoche_txdrv), .exten_guoche_rxdig(exten_guoche_rxdig), .exten_guoche_rxintp(exten_guoche_rxintp), .fm_ana_sq_out (fm_ana_sq_out), .cal_zzeddr_done (cal_zzeddr_done), .jcq_cal_ops_freeze_hsdlfuous(jcq_cal_ops_freeze_hsdlfuous), .exten_mmslv_txclk (exten_mmslv_txclk), .exten_mmslv_txsujuju(exten_mmslv_txsujuju), .exten_mmslv_txintp(exten_mmslv_txintp), .exten_mmslv_txdrv (exten_mmslv_txdrv), .exten_mmslv_rxdig (exten_mmslv_rxdig), .to_mni_lq_ivref (to_mni_lq_ivref), .to_mni_pll_clk_ready(to_mni_pll_clk_ready), .jcq_force_no_skip_hsdlfuous(jcq_force_no_skip_hsdlfuous), .to_mni_lq_tx (to_mni_lq_tx), .MNI_IDLE (MNI_IDLE), .to_mni_lq_tx_intp (to_mni_lq_tx_intp), .to_mni_ssc_en (to_mni_ssc_en), .to_mni_lq_rx (to_mni_lq_rx), .ops_cal_start (ops_cal_start), .HIOPSR (HIOPSR), .jcq_cal_ops_hsdlfuous_mode(jcq_cal_ops_hsdlfuous_mode), .jcq_cal_ops_zzeddr_rerun_en(jcq_cal_ops_zzeddr_rerun_en), .slew_ctrl_en (slew_ctrl_en), .jcq_cal_ops_zzeddren_tx_force(jcq_cal_ops_zzeddren_tx_force), .jcq_force_no_pause_hsdlfuous(jcq_force_no_pause_hsdlfuous), .to_mni_lq_pll (to_mni_lq_pll), .reset (resetb), // Templated .ref_clk (ref_clk), .micho_1m (micho_1m), .jcq_ops_cal_read (jcq_ops_cal_read[3:0]), .ext_mmslv_jsdsjul (ext_mmslv_jsdsjul[4:0]), .ext_mmslv_rxdig (ext_mmslv_rxdig[4:0]), .ext_mmslv_rxintp (ext_mmslv_rxintp[4:0]), .ext_mmslv_txintp (ext_mmslv_txintp[4:0]), .ext_mmslv_txdrv (ext_mmslv_txdrv[4:0]), .ext_mmslv_txsujuju (ext_mmslv_txsujuju[4:0]), .jcq_cal_ops_calen_jsdsjul(jcq_cal_ops_calen_jsdsjul[1:0]), .ext_mmslv_txclk (ext_mmslv_txclk[4:0]), .jcq_cal_ops_calen_txintp(jcq_cal_ops_calen_txintp[1:0]), .jcq_cal_ops_calen_txdrv(jcq_cal_ops_calen_txdrv[1:0]), .jcq_cal_ops_calen_rxdig(jcq_cal_ops_calen_rxdig[1:0]), .jcq_cal_ops_calen_rxintp(jcq_cal_ops_calen_rxintp[1:0]), .zzeddr_in (zzeddr_in[3:0]), .jcq_cal_ops_calen_txclk(jcq_cal_ops_calen_txclk[1:0]), .jcq_cal_ops_calen_txsujuju(jcq_cal_ops_calen_txsujuju[1:0]), .jcq_cal_ops_speed (jcq_cal_ops_speed[1:0]), .jcq_cal_ops_zzeddren_tx(jcq_cal_ops_zzeddren_tx[1:0]), .jcq_cal_ops_zzeddr_value_default(jcq_cal_ops_zzeddr_value_default[3:0]), .IN0 (LVSEL_RXWHTH[0]), // Templated .IN1 (LVSEL_RXWHTH[1]), // Templated .IN2 (reset), // Templated .IN3 (reset), // Templated .IN4 (reset), // Templated .IN5 (reset), // Templated .IN6 (reset), // Templated .IN7 (reset), // Templated .IN8 (reset), // Templated .IN9 (reset), // Templated .IN10 (reset), // Templated .IN11 (reset), // Templated .IN12 (reset), // Templated .IN13 (reset), // Templated .IN14 (reset), // Templated .IN15 (reset), // Templated .IN16 (reset), // Templated .IN17 (reset), // Templated .IN18 (reset), // Templated .IN19 (reset), // Templated .IN20 (reset), // Templated .IN21 (reset), // Templated .IN22 (reset), // Templated .IN23 (reset), // Templated .IN24 (reset), // Templated .IN25 (pin_sout4), // Templated .IN26 (pin_sout7), // Templated .IN27 (pin_scan_en), // Templated .IN28 (pin_scan_en), // Templated .IN29 (pin_scan_en), // Templated .IN30 (pin_scan_en), // Templated .IN31 (pin_scan_en), // Templated .IN32 (pin_scan_en), // Templated .IN33 (pin_scan_en), // Templated .IN34 (pin_scan_en), // Templated .IN35 (pin_scan_en), // Templated .IN36 (pin_scan_en), // Templated .IN37 (pin_scan_en), // Templated .IN38 (pin_scan_en), // Templated .IN39 (pin_scan_en), // Templated .IN40 (pin_scan_en), // Templated .IN41 (pin_scan_en), // Templated .IN42 (pin_scan_en), // Templated .IN43 (pin_scan_en), // Templated .IN44 (pin_scan_en), // Templated .IN45 (pin_scan_en), // Templated .IN46 (pin_scan_en), // Templated .IN47 (pin_scan_en), // Templated .IN48 (pin_scan_en), // Templated .IN49 (pin_scan_en), // Templated .IN50 (pin_scan_en), // Templated .IN51 (pin_scan_en), // Templated .IN52 (pin_scan_en), // Templated .IN53 (pin_scan_en), // Templated .IN54 (pin_scan_en), // Templated .IN55 (pin_scan_en), // Templated .IN56 (pin_scan_en), // Templated .IN57 (pin_scan_en), // Templated .IN58 (pin_scan_en), // Templated .IN59 (pin_scan_en), // Templated .cshi_si22 (pin_sin22), // Templated .cshi_si17 (pin_sin17), // Templated .cshi_si14 (pin_sin14), // Templated .cshi_si13 (pin_sin13), // Templated .cshi_si12 (pin_sin12), // Templated .cshi_si8 (pin_sin8), // Templated .ref_clk_cts_1 (ref_clk), // Templated .ref_clk_cts_2 (ref_clk), // Templated .ref_clk_cts_3 (ref_clk), // Templated .ref_clk_cts_4 (ref_clk), // Templated .ref_clk_cts_5 (ref_clk), // Templated .ref_clk_cts_6 (ref_clk), // Templated .ref_clk_cts_7 (ref_clk), // Templated .ref_clk_cts_8 (ref_clk), // Templated .ref_clk_cts_9 (ref_clk), // Templated .ref_clk_cts_0_1 (ref_clkinv), // Templated .ref_clk_cts_1_1 (ref_clkinv), // Templated .cshi_si36 (pin_sin36), // Templated .cshi_si35 (pin_sin35), // Templated .cshi_si34 (pin_sin34), // Templated .cshi_si33 (pin_sin33), // Templated .cshi_si32 (pin_sin32), // Templated .cshi_si31 (pin_sin31), // Templated .cshi_si30 (pin_sin30), // Templated .cshi_si29 (pin_sin29), // Templated .cshi_si28 (pin_sin28), // Templated .cshi_si27 (pin_sin27), // Templated .cshi_si26 (pin_sin26), // Templated .cshi_si25 (pin_sin25), // Templated .cshi_si24 (pin_sin24), // Templated .cshi_si23 (pin_sin23)); // Templated endmodule // ETOP module sync2_cell_167 (clk , reset , sujuju , cshi_se , cshi_si , qout , cshi_si2 ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; input cshi_si2 ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( sujuju ) , .SCN ( cshi_se ) , .SI ( cshi_si2 ) , .CK ( clk ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; endmodule module sync2_cell_133 (clk , reset , sujuju , cshi_se , cshi_si , qout , cshi_si2 ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; input cshi_si2 ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( sujuju ) , .SCN ( cshi_se ) , .SI ( cshi_si2 ) , .CK ( clk ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; endmodule module sync2_cell_159 (clk , reset , sujuju , cshi_se , cshi_si , qout , cshi_si1 ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; input cshi_si1 ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( sujuju ) , .SCN ( cshi_se ) , .SI ( cshi_si1 ) , .CK ( clk ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; endmodule module sync2_cell_158 (clk , reset , sujuju , cshi_se , cshi_si , qout , cshi_si2 ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; input cshi_si2 ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( STIELOW_U16_NET ) , .SCN ( cshi_se ) , .SI ( cshi_si2 ) , .CK ( clk ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; STIELOW STIELOW_U16 (.TIEL ( STIELOW_U16_NET ) ) ; endmodule module sync2_cell_145 (clk , reset , sujuju , cshi_se , cshi_si , qout , cshi_si2 ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; input cshi_si2 ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( STIELOW_U12_NET ) , .SCN ( cshi_se ) , .SI ( cshi_si2 ) , .CK ( clk ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; STIELOW STIELOW_U12 (.TIEL ( STIELOW_U12_NET ) ) ; endmodule module sync2_cell_131 (clk , reset , sujuju , cshi_se , cshi_si , qout , cshi_si2 ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; input cshi_si2 ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( sujuju ) , .SCN ( cshi_se ) , .SI ( cshi_si2 ) , .CK ( clk ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; endmodule module sync2_cell_140 (clk , reset , sujuju , cshi_se , cshi_si , qout , cshi_si2 ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; input cshi_si2 ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( sujuju ) , .SCN ( cshi_se ) , .SI ( cshi_si2 ) , .CK ( clk ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; endmodule module sync2_cell_130 (clk , reset , sujuju , cshi_se , cshi_si , qout , cshi_si2 ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; input cshi_si2 ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( sujuju ) , .SCN ( cshi_se ) , .SI ( cshi_si2 ) , .CK ( clk ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; endmodule module sync2_cell_154 (clk , reset , sujuju , cshi_se , cshi_si , qout , cshi_si2 ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; input cshi_si2 ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( sujuju ) , .SCN ( cshi_se ) , .SI ( net116 ) , .CK ( clk ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; SBUFX4 U403 (.Z ( net116 ) , .A ( cshi_si2 ) ) ; endmodule module sync2_cell_152 (clk , reset , sujuju , cshi_se , cshi_si , qout , cshi_si1 ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; input cshi_si1 ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( STIELOW_U9_NET ) , .SCN ( cshi_se ) , .SI ( cshi_si1 ) , .CK ( clk ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; STIELOW STIELOW_U9 (.TIEL ( STIELOW_U9_NET ) ) ; endmodule module sync2_cell_138 (clk , reset , sujuju , cshi_se , cshi_si , qout , cshi_si2 ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; input cshi_si2 ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( STIELOW_U14_NET ) , .SCN ( cshi_se ) , .SI ( cshi_si2 ) , .CK ( clk ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; STIELOW STIELOW_U14 (.TIEL ( STIELOW_U14_NET ) ) ; endmodule module sync2_cell_157 (clk , reset , sujuju , cshi_se , cshi_si , qout , cshi_si2 ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; input cshi_si2 ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( sujuju ) , .SCN ( cshi_se ) , .SI ( cshi_si2 ) , .CK ( clk ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; endmodule module sync2_cell_149 (clk , reset , sujuju , cshi_se , cshi_si , qout , cshi_si2 ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; input cshi_si2 ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( STIELOW_U6_NET ) , .SCN ( cshi_se ) , .SI ( cshi_si2 ) , .CK ( clk ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; STIELOW STIELOW_U6 (.TIEL ( STIELOW_U6_NET ) ) ; endmodule module sync2_cell_164 (clk , reset , sujuju , cshi_se , cshi_si , qout , cshi_si2 ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; input cshi_si2 ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( sujuju ) , .SCN ( cshi_se ) , .SI ( cshi_si2 ) , .CK ( clk ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; endmodule module sync2_cell_166 (clk , reset , sujuju , cshi_se , cshi_si , qout ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( sujuju ) , .SCN ( cshi_se ) , .SI ( cshi_si ) , .CK ( clk ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; endmodule module sync2_cell_135 (clk , reset , sujuju , cshi_se , cshi_si , qout , cshi_si2 ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; input cshi_si2 ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( STIELOW_U4_NET ) , .SCN ( cshi_se ) , .SI ( cshi_si2 ) , .CK ( clk ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; STIELOW STIELOW_U4 (.TIEL ( STIELOW_U4_NET ) ) ; endmodule module sync2_cell_168 (clk , reset , sujuju , cshi_se , cshi_si , qout ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( sujuju ) , .SCN ( cshi_se ) , .SI ( cshi_si ) , .CK ( clk ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; endmodule module sync2_cell_142 (clk , reset , sujuju , cshi_se , cshi_si , qout , cshi_si1 ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; input cshi_si1 ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( sujuju ) , .SCN ( cshi_se ) , .SI ( cshi_si1 ) , .CK ( clk ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; endmodule module sync2_cell_151 (clk , reset , sujuju , cshi_se , cshi_si , qout , cshi_si2 ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; input cshi_si2 ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( STIELOW_U8_NET ) , .SCN ( cshi_se ) , .SI ( cshi_si2 ) , .CK ( clk ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; STIELOW STIELOW_U8 (.TIEL ( STIELOW_U8_NET ) ) ; endmodule module sync2_cell_143 (clk , reset , sujuju , cshi_se , cshi_si , qout , cshi_si2 ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; input cshi_si2 ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( net130 ) , .SCN ( cshi_se ) , .SI ( cshi_si2 ) , .CK ( clk ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; SBUFX4 U420 (.Z ( net130 ) , .A ( sujuju ) ) ; endmodule module sync2_cell_134 (clk , reset , sujuju , cshi_se , cshi_si , qout , cshi_si2 ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; input cshi_si2 ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( STIELOW_U5_NET ) , .SCN ( cshi_se ) , .SI ( cshi_si2 ) , .CK ( clk ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; STIELOW STIELOW_U5 (.TIEL ( STIELOW_U5_NET ) ) ; endmodule module sync2_cell_150 (clk , reset , sujuju , cshi_se , cshi_si , qout , cshi_si1 ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; input cshi_si1 ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( STIELOW_U7_NET ) , .SCN ( cshi_se ) , .SI ( cshi_si1 ) , .CK ( clk ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; STIELOW STIELOW_U7 (.TIEL ( STIELOW_U7_NET ) ) ; endmodule module sync2_cell_136 (clk , reset , sujuju , cshi_se , cshi_si , qout , cshi_so , IN0 , clk_cts_1 , cshi_si3 , cshi_si4 ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; output cshi_so ; input IN0 ; input clk_cts_1 ; input cshi_si3 ; input cshi_si4 ; SDFNX4 LOCKUP (.CKB ( clk ) , .Q ( cshi_so ) , .D ( cshi_si3 ) ) ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( STIELOW_U2_NET ) , .SCN ( cshi_se ) , .SI ( cshi_si4 ) , .CK ( clk_cts_1 ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; STIELOW STIELOW_U2 (.TIEL ( STIELOW_U2_NET ) ) ; endmodule module sync2_cell_155 (clk , reset , sujuju , cshi_se , cshi_si , qout , cshi_si1 ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; input cshi_si1 ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( sujuju ) , .SCN ( cshi_se ) , .SI ( cshi_si1 ) , .CK ( clk ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; endmodule module sync2_cell_169 (clk , reset , sujuju , cshi_se , cshi_si , qout ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( STIELOW_U15_NET ) , .SCN ( cshi_se ) , .SI ( cshi_si ) , .CK ( clk ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; STIELOW STIELOW_U15 (.TIEL ( STIELOW_U15_NET ) ) ; endmodule module sync2_cell_162 (clk , reset , sujuju , cshi_se , cshi_si , qout , cshi_si2 ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; input cshi_si2 ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( sujuju ) , .SCN ( cshi_se ) , .SI ( cshi_si2 ) , .CK ( clk ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; endmodule module sync2_cell_156 (clk , reset , sujuju , cshi_se , cshi_si , qout , cshi_si2 ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; input cshi_si2 ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( sujuju ) , .SCN ( cshi_se ) , .SI ( cshi_si2 ) , .CK ( clk ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; endmodule module sync2_cell_139 (clk , reset , sujuju , cshi_se , cshi_si , qout , cshi_si1 ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; input cshi_si1 ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( sujuju ) , .SCN ( cshi_se ) , .SI ( cshi_si1 ) , .CK ( clk ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; endmodule module sync2_cell_147 (clk , reset , sujuju , cshi_se , cshi_si , qout , cshi_si2 ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; input cshi_si2 ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( STIELOW_U10_NET ) , .SCN ( cshi_se ) , .SI ( cshi_si2 ) , .CK ( clk ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; STIELOW STIELOW_U10 (.TIEL ( STIELOW_U10_NET ) ) ; endmodule module sync2_cell_165 (clk , reset , sujuju , cshi_se , cshi_si , qout , cshi_so , IN0 , clk_cts_1 , cshi_si3 , cshi_si4 ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; output cshi_so ; input IN0 ; input clk_cts_1 ; input cshi_si3 ; input cshi_si4 ; SDFNX4 LOCKUP (.CKB ( clk ) , .Q ( cshi_so ) , .D ( cshi_si4 ) ) ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( sujuju ) , .SCN ( cshi_se ) , .SI ( cshi_si3 ) , .CK ( clk_cts_1 ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; endmodule module sync2_cell_132 (clk , reset , sujuju , cshi_se , cshi_si , qout ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( sujuju ) , .SCN ( cshi_se ) , .SI ( cshi_si ) , .CK ( clk ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; endmodule module sync2_cell_161 (clk , reset , sujuju , cshi_se , cshi_si , qout , cshi_si2 ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; input cshi_si2 ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( sujuju ) , .SCN ( cshi_se ) , .SI ( cshi_si2 ) , .CK ( clk ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; endmodule module sync2_cell_144 (clk , reset , sujuju , cshi_se , cshi_si , qout , cshi_si1 ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; input cshi_si1 ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( sujuju ) , .SCN ( cshi_se ) , .SI ( cshi_si1 ) , .CK ( clk ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; endmodule module sync2_cell_137 (clk , reset , sujuju , cshi_se , cshi_si , qout ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( STIELOW_U3_NET ) , .SCN ( cshi_se ) , .SI ( cshi_si ) , .CK ( clk ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; STIELOW STIELOW_U3 (.TIEL ( STIELOW_U3_NET ) ) ; endmodule module sync2_cell_146 (clk , reset , sujuju , cshi_se , cshi_si , qout , cshi_si1 ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; input cshi_si1 ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( STIELOW_U13_NET ) , .SCN ( cshi_se ) , .SI ( cshi_si1 ) , .CK ( clk ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; STIELOW STIELOW_U13 (.TIEL ( STIELOW_U13_NET ) ) ; endmodule module sync2_cell_163 (clk , reset , sujuju , cshi_se , cshi_si , qout , cshi_si2 ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; input cshi_si2 ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( STIELOW_U17_NET ) , .SCN ( cshi_se ) , .SI ( cshi_si2 ) , .CK ( clk ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; STIELOW STIELOW_U17 (.TIEL ( STIELOW_U17_NET ) ) ; endmodule module sync2_cell_160 (clk , reset , sujuju , cshi_se , cshi_si , qout , cshi_si2 ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; input cshi_si2 ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( sujuju ) , .SCN ( cshi_se ) , .SI ( cshi_si2 ) , .CK ( clk ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; endmodule module sync2_cell_170 (clk , reset , sujuju , cshi_se , cshi_si , qout , cshi_si2 ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; input cshi_si2 ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( sujuju ) , .SCN ( cshi_se ) , .SI ( cshi_si2 ) , .CK ( clk ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; endmodule module sync2_cell_153 (clk , reset , sujuju , cshi_se , cshi_si , qout , cshi_si1 ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; input cshi_si1 ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( sujuju ) , .SCN ( cshi_se ) , .SI ( cshi_si1 ) , .CK ( clk ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; endmodule module sync2_cell_148 (clk , reset , sujuju , cshi_se , cshi_si , qout , cshi_si2 ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; input cshi_si2 ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( STIELOW_U11_NET ) , .SCN ( cshi_se ) , .SI ( cshi_si2 ) , .CK ( clk ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; STIELOW STIELOW_U11 (.TIEL ( STIELOW_U11_NET ) ) ; endmodule module sync2_cell_141 (clk , reset , sujuju , cshi_se , cshi_si , qout , cshi_si2 ); input clk ; input reset ; input sujuju ; input cshi_se ; input cshi_si ; output qout ; input cshi_si2 ; S2DSYNCX4 U_BUDO_TYNC2 (.D ( sujuju ) , .SCN ( cshi_se ) , .SI ( cshi_si2 ) , .CK ( clk ) , .RB ( reset_n ) , .Q ( qout ) ) ; SIVX4 U_DONT_RST_INV (.Z ( reset_n ) , .A ( reset ) ) ; endmodule module ops_cal_ctrl_1 (HEEN_OPS_JSDSJUL , cshi_so7 , cshi_so6 , cshi_so5 , cshi_so4 , cshi_so3 , cshi_so2 , cshi_so1 , cshi_si1 , ops_cal_zzeddr_start , HEEN_OPS_TXCLK , HEEN_OPS_TXSUJUJU , HEEN_OPS_TXWHTH , HEEN_OPS_TXDRV , HEEN_OPS_RXDIG , HEEN_OPS_RXWHTH , exten_guoche_jsdsjul , cshi_se , cshi_si7 , cshi_si6 , cshi_si5 , cshi_si4 , cshi_si3 , cshi_si2 , exten_mmslv_rxintp , exten_mmslv_jsdsjul , exten_guoche_txclk , exten_guoche_txsujuju , exten_guoche_txintp , exten_guoche_txdrv , exten_guoche_rxdig , exten_guoche_rxintp , fm_ana_sq_out , cal_zzeddr_done , jcq_cal_ops_freeze_hsdlfuous , exten_mmslv_txclk , exten_mmslv_txsujuju , exten_mmslv_txintp , exten_mmslv_txdrv , exten_mmslv_rxdig , to_mni_lq_ivref , to_mni_pll_clk_ready , jcq_force_no_skip_hsdlfuous , to_mni_lq_tx , MNI_IDLE , to_mni_lq_tx_intp , to_mni_ssc_en , to_mni_lq_rx , ops_cal_start , HIOPSR , jcq_cal_ops_hsdlfuous_mode , jcq_cal_ops_zzeddr_rerun_en , slew_ctrl_en , jcq_cal_ops_zzeddren_tx_force , jcq_force_no_pause_hsdlfuous , to_mni_lq_pll , jcq_rd_ops_results , reset , ref_clk , micho_1m , LVSEL_RXWHTH , LVSEL_JSDSJUL , LVSEL_TXDRV , LVSEL_RXDIG , LVSEL_TXWHTH , LVSEL_TXCLK , LVSEL_TXSUJUJU , jcq_ops_cal_read , PROCESS_VALUE , ext_mmslv_jsdsjul , ext_mmslv_rxdig , ext_mmslv_rxintp , ext_mmslv_txintp , ext_mmslv_txdrv , ext_mmslv_txsujuju , jcq_cal_ops_calen_jsdsjul , ext_mmslv_txclk , jcq_cal_ops_calen_txintp , jcq_cal_ops_calen_txdrv , jcq_cal_ops_calen_rxdig , jcq_cal_ops_calen_rxintp , zzeddr_in , jcq_cal_ops_calen_txclk , jcq_cal_ops_calen_txsujuju , jcq_cal_ops_speed , jcq_cal_ops_zzeddren_tx , jcq_cal_ops_zzeddr_value_default , IN0 , IN1 , IN2 , IN3 , IN4 , IN5 , IN6 , IN7 , IN8 , IN9 , IN10 , IN11 , IN12 , IN13 , IN14 , IN15 , IN16 , IN17 , IN18 , IN19 , IN20 , IN21 , IN22 , IN23 , IN24 , IN25 , IN26 , IN27 , IN28 , IN29 , IN30 , IN31 , IN32 , IN33 , IN34 , IN35 , IN36 , IN37 , IN38 , IN39 , IN40 , IN41 , IN42 , IN43 , IN44 , IN45 , IN46 , IN47 , IN48 , IN49 , IN50 , IN51 , IN52 , IN53 , IN54 , IN55 , IN56 , IN57 , IN58 , IN59 , cshi_si22 , cshi_si17 , cshi_si14 , cshi_si13 , cshi_si12 , cshi_si8 , cshi_so23 , cshi_so19 , cshi_so14 , cshi_so9 , ref_clk_cts_1 , ref_clk_cts_2 , ref_clk_cts_3 , ref_clk_cts_4 , ref_clk_cts_5 , ref_clk_cts_6 , ref_clk_cts_7 , ref_clk_cts_8 , ref_clk_cts_9 , ref_clk_cts_0_1 , ref_clk_cts_1_1 , cshi_si36 , cshi_si35 , cshi_si34 , cshi_si33 , cshi_si32 , cshi_si31 , cshi_si30 , cshi_si29 , cshi_si28 , cshi_si27 , cshi_si26 , cshi_si25 , cshi_si24 , cshi_si23 , cshi_so37 , cshi_so36 , cshi_so35 , cshi_so34 , cshi_so33 , cshi_so32 , cshi_so31 , cshi_so30 , cshi_so29 , cshi_so28 , cshi_so27 , cshi_so26 , cshi_so25 , cshi_so24 ); output HEEN_OPS_JSDSJUL ; output cshi_so7 ; output cshi_so6 ; output cshi_so5 ; output cshi_so4 ; output cshi_so3 ; output cshi_so2 ; output cshi_so1 ; input cshi_si1 ; output ops_cal_zzeddr_start ; output HEEN_OPS_TXCLK ; output HEEN_OPS_TXSUJUJU ; output HEEN_OPS_TXWHTH ; output HEEN_OPS_TXDRV ; output HEEN_OPS_RXDIG ; output HEEN_OPS_RXWHTH ; input exten_guoche_jsdsjul ; input cshi_se ; input cshi_si7 ; input cshi_si6 ; input cshi_si5 ; input cshi_si4 ; input cshi_si3 ; input cshi_si2 ; input exten_mmslv_rxintp ; input exten_mmslv_jsdsjul ; input exten_guoche_txclk ; input exten_guoche_txsujuju ; input exten_guoche_txintp ; input exten_guoche_txdrv ; input exten_guoche_rxdig ; input exten_guoche_rxintp ; input fm_ana_sq_out ; input cal_zzeddr_done ; input jcq_cal_ops_freeze_hsdlfuous ; input exten_mmslv_txclk ; input exten_mmslv_txsujuju ; input exten_mmslv_txintp ; input exten_mmslv_txdrv ; input exten_mmslv_rxdig ; input to_mni_lq_ivref ; input to_mni_pll_clk_ready ; input jcq_force_no_skip_hsdlfuous ; input to_mni_lq_tx ; input MNI_IDLE ; input to_mni_lq_tx_intp ; input to_mni_ssc_en ; input to_mni_lq_rx ; input ops_cal_start ; input HIOPSR ; input jcq_cal_ops_hsdlfuous_mode ; input jcq_cal_ops_zzeddr_rerun_en ; input slew_ctrl_en ; input jcq_cal_ops_zzeddren_tx_force ; input jcq_force_no_pause_hsdlfuous ; input to_mni_lq_pll ; output [4:0] jcq_rd_ops_results ; input reset ; input ref_clk ; input micho_1m ; output [4:0] LVSEL_RXWHTH ; output [4:0] LVSEL_JSDSJUL ; output [4:0] LVSEL_TXDRV ; output [4:0] LVSEL_RXDIG ; output [4:0] LVSEL_TXWHTH ; output [4:0] LVSEL_TXCLK ; output [4:0] LVSEL_TXSUJUJU ; input [3:0] jcq_ops_cal_read ; output [3:0] PROCESS_VALUE ; input [4:0] ext_mmslv_jsdsjul ; input [4:0] ext_mmslv_rxdig ; input [4:0] ext_mmslv_rxintp ; input [4:0] ext_mmslv_txintp ; input [4:0] ext_mmslv_txdrv ; input [4:0] ext_mmslv_txsujuju ; input [1:0] jcq_cal_ops_calen_jsdsjul ; input [4:0] ext_mmslv_txclk ; input [1:0] jcq_cal_ops_calen_txintp ; input [1:0] jcq_cal_ops_calen_txdrv ; input [1:0] jcq_cal_ops_calen_rxdig ; input [1:0] jcq_cal_ops_calen_rxintp ; input [3:0] zzeddr_in ; input [1:0] jcq_cal_ops_calen_txclk ; input [1:0] jcq_cal_ops_calen_txsujuju ; input [1:0] jcq_cal_ops_speed ; input [1:0] jcq_cal_ops_zzeddren_tx ; input [3:0] jcq_cal_ops_zzeddr_value_default ; input IN0 ; input IN1 ; input IN2 ; input IN3 ; input IN4 ; input IN5 ; input IN6 ; input IN7 ; input IN8 ; input IN9 ; input IN10 ; input IN11 ; input IN12 ; input IN13 ; input IN14 ; input IN15 ; input IN16 ; input IN17 ; input IN18 ; input IN19 ; input IN20 ; input IN21 ; input IN22 ; input IN23 ; input IN24 ; input IN25 ; input IN26 ; input IN27 ; input IN28 ; input IN29 ; input IN30 ; input IN31 ; input IN32 ; input IN33 ; input IN34 ; input IN35 ; input IN36 ; input IN37 ; input IN38 ; input IN39 ; input IN40 ; input IN41 ; input IN42 ; input IN43 ; input IN44 ; input IN45 ; input IN46 ; input IN47 ; input IN48 ; input IN49 ; input IN50 ; input IN51 ; input IN52 ; input IN53 ; input IN54 ; input IN55 ; input IN56 ; input IN57 ; input IN58 ; input IN59 ; input cshi_si22 ; input cshi_si17 ; input cshi_si14 ; input cshi_si13 ; input cshi_si12 ; input cshi_si8 ; output cshi_so23 ; output cshi_so19 ; output cshi_so14 ; output cshi_so9 ; input ref_clk_cts_1 ; input ref_clk_cts_2 ; input ref_clk_cts_3 ; input ref_clk_cts_4 ; input ref_clk_cts_5 ; input ref_clk_cts_6 ; input ref_clk_cts_7 ; input ref_clk_cts_8 ; input ref_clk_cts_9 ; input ref_clk_cts_0_1 ; input ref_clk_cts_1_1 ; input cshi_si36 ; input cshi_si35 ; input cshi_si34 ; input cshi_si33 ; input cshi_si32 ; input cshi_si31 ; input cshi_si30 ; input cshi_si29 ; input cshi_si28 ; input cshi_si27 ; input cshi_si26 ; input cshi_si25 ; input cshi_si24 ; input cshi_si23 ; output cshi_so37 ; output cshi_so36 ; output cshi_so35 ; output cshi_so34 ; output cshi_so33 ; output cshi_so32 ; output cshi_so31 ; output cshi_so30 ; output cshi_so29 ; output cshi_so28 ; output cshi_so27 ; output cshi_so26 ; output cshi_so25 ; output cshi_so24 ; wire [1:0] jcq_cal_ops_calen_txdrv_sync2 ; wire [1:0] jcq_cal_ops_calen_jsdsjul_sync2 ; wire [1:0] jcq_cal_ops_calen_rxdig_sync2 ; wire [1:0] jcq_cal_ops_calen_txclk_sync2 ; wire [9:0] curr_state ; wire [7:0] zzeddr_rerun_time_cnt ; wire [2:0] HIOPSR_jsu_1M_div8 ; wire [4:0] lvsel_jsdsjul_q ; wire [4:0] lvsel_txclk_q ; wire [4:0] lvsel_txintp_q ; wire [4:0] lvsel_txsujuju_q ; sync2_cell_160 sync2_cell_reg_cal_ops_speed_1 (.clk ( ref_clk_cts_7 ) , .reset ( n728 ) , .sujuju ( jcq_cal_ops_speed[1] ) , .cshi_se ( cshi_se ) , .cshi_si ( cshi_so28 ) , .qout ( cshi_so12 ) , .cshi_si2 ( jcq_cal_ops_calen_txdrv_sync2[0] ) ) ; sync2_cell_161 sync2_cell_reg_force_no_pause_hsdlfuous ( .clk ( net_ICC_CTS_1__G1B6I65 ) , .reset ( IN20 ) , .sujuju ( jcq_force_no_pause_hsdlfuous ) , .cshi_se ( IN57 ) , .cshi_si ( cshi_so12 ) , .qout ( jcq_force_no_pause_hsdlfuous_sync2 ) , .cshi_si2 ( cshi_so3 ) ) ; sync2_cell_158 sync2_cell_reg_cal_ops_zzeddren_tx_force ( .clk ( net_ICC_CTS_1__G1B6I65 ) , .reset ( IN16 ) , .sujuju ( 1'b0 ), .cshi_se ( IN58 ) , .cshi_si ( cshi_so11 ) , .qout ( jcq_cal_ops_zzeddren_tx_force_sync2 ) , .cshi_si2 ( jcq_cal_ops_calen_txdrv_sync2[1] ) ) ; sync2_cell_156 sync2_cell_reg_cal_ops_zzeddren_tx_0 ( .clk ( net_ICC_CTS_1__G1B6I44 ) , .reset ( IN13 ) , .sujuju ( jcq_cal_ops_zzeddren_tx[0] ) , .cshi_se ( IN53 ) , .cshi_si ( jcq_cal_ops_zzeddr_rerun_en_sync2 ) , .qout ( jcq_cal_ops_zzeddren_tx_sync2_0_ ) , .cshi_si2 ( jcq_cal_ops_hsdlfuous_mode_sync2 ) ) ; sync2_cell_157 sync2_cell_reg_cal_ops_zzeddren_tx_1 ( .clk ( net_ICC_CTS_1__G1B6I65 ) , .reset ( IN15 ) , .sujuju ( jcq_cal_ops_zzeddren_tx[1] ) , .cshi_se ( IN56 ) , .cshi_si ( jcq_cal_ops_zzeddren_tx_sync2_0_ ) , .qout ( cshi_so11 ) , .cshi_si2 ( jcq_cal_ops_calen_jsdsjul_sync2[0] ) ) ; sync2_cell_163 sync2_cell_slew_ctrl_en (.clk ( net_ICC_CTS_1__G1B6I65 ) , .reset ( IN14 ) , .sujuju ( 1'b0 ), .cshi_se ( IN55 ) , .cshi_si ( jcq_force_no_skip_hsdlfuous_sync2 ) , .qout ( slew_ctrl_en_sync2 ) , .cshi_si2 ( jcq_cal_ops_calen_rxdig_sync2[1] ) ) ; sync2_cell_155 sync2_cell_reg_cal_ops_zzeddr_rerun_en ( .clk ( net_ICC_CTS_1__G1B6I65 ) , .reset ( IN21 ) , .sujuju ( jcq_cal_ops_zzeddr_rerun_en ) , .cshi_se ( IN54 ) , .cshi_si ( cshi_so9 ) , .qout ( jcq_cal_ops_zzeddr_rerun_en_sync2 ) , .cshi_si1 ( jcq_force_no_pause_hsdlfuous_sync2 ) ) ; sync2_cell_153 sync2_cell_reg_cal_ops_hsdlfuous_mode ( .clk ( net_ICC_CTS_1__G1B6I65 ) , .reset ( IN5 ) , .sujuju ( jcq_cal_ops_hsdlfuous_mode ) , .cshi_se ( IN44 ) , .cshi_si ( jcq_cal_ops_calen_txintp_sync2_1_ ) , .qout ( jcq_cal_ops_hsdlfuous_mode_sync2 ) , .cshi_si1 ( jcq_cal_ops_zzeddr_rerun_en_sync2 ) ) ; sync2_cell_159 sync2_cell_reg_cal_ops_speed_0 (.clk ( ref_clk_cts_7 ) , .reset ( n728 ) , .sujuju ( jcq_cal_ops_speed[0] ) , .cshi_se ( cshi_se ) , .cshi_si ( jcq_cal_ops_zzeddren_tx_force_sync2 ) , .qout ( cshi_so28 ) , .cshi_si1 ( cshi_si12 ) ) ; sync2_cell_170 sync2_cell_to_mni_ssc_en (.clk ( net_ICC_CTS_1__G1B6I65 ) , .reset ( IN11 ) , .sujuju ( to_mni_ssc_en ) , .cshi_se ( IN52 ) , .cshi_si ( n675 ) , .qout ( cshi_so3 ) , .cshi_si2 ( jcq_force_no_skip_hsdlfuous_sync2 ) ) ; sync2_cell_169 sync2_cell_to_mni_lq_tx_intp (.clk ( ref_clk_cts_7 ) , .reset ( IN12 ) , .sujuju ( 1'b0 ), .cshi_se ( cshi_se ) , .cshi_si ( to_mni_lq_tx_sync2 ) , .qout ( n675 ) ) ; sync2_cell_130 sync2_cell_ANA_IDLE (.clk ( ref_clk_cts_2 ) , .reset ( IN18 ) , .sujuju ( MNI_IDLE ) , .cshi_se ( cshi_se ) , .cshi_si ( cshi_si1 ) , .qout ( MNI_IDLE_sync2 ) , .cshi_si2 ( cshi_si22 ) ) ; sync2_cell_168 sync2_cell_to_mni_lq_tx (.clk ( ref_clk_cts_1 ) , .reset ( IN17 ) , .sujuju ( to_mni_lq_tx ) , .cshi_se ( cshi_se ) , .cshi_si ( to_mni_lq_rx_sync2 ) , .qout ( to_mni_lq_tx_sync2 ) ) ; sync2_cell_162 sync2_cell_reg_force_no_skip_hsdlfuous ( .clk ( net_ICC_CTS_1__G1B6I65 ) , .reset ( IN6 ) , .sujuju ( jcq_force_no_skip_hsdlfuous ) , .cshi_se ( IN49 ) , .cshi_si ( jcq_force_no_pause_hsdlfuous_sync2 ) , .qout ( jcq_force_no_skip_hsdlfuous_sync2 ) , .cshi_si2 ( jcq_cal_ops_calen_txclk_sync2[0] ) ) ; sync2_cell_164 sync2_cell_to_mni_pll_clk_ready (.clk ( ref_clk_cts_8 ) , .reset ( IN22 ) , .sujuju ( to_mni_pll_clk_ready ) , .cshi_se ( IN40 ) , .cshi_si ( slew_ctrl_en_sync2 ) , .qout ( cshi_so37 ) , .cshi_si2 ( cshi_si36 ) ) ; sync2_cell_165 sync2_cell_to_mni_lq_ivref (.clk ( ref_clk ) , .reset ( IN19 ) , .sujuju ( to_mni_lq_ivref ) , .cshi_se ( cshi_se ) , .cshi_si ( cshi_so37 ) , .qout ( to_mni_lq_ivref_sync2 ) , .cshi_so ( cshi_so2 ) , .IN0 ( to_mni_lq_ivref_sync2 ) , .clk_cts_1 ( ref_clk_cts_2 ) , .cshi_si3 ( cshi_si25 ) , .cshi_si4 ( cshi_si28 ) ) ; sync2_cell_166 sync2_cell_to_mni_lq_pll (.clk ( ref_clk_cts_5 ) , .reset ( IN23 ) , .sujuju ( to_mni_lq_pll ) , .cshi_se ( IN41 ) , .cshi_si ( cshi_si3 ) , .qout ( to_mni_lq_pll_sync2 ) ) ; sync2_cell_151 sync2_cell_reg_cal_ops_calen_txintp_0 ( .clk ( ref_clk_cts_7 ) , .reset ( n728 ) , .sujuju ( 1'b0 ), .cshi_se ( IN34 ) , .cshi_si ( jcq_cal_ops_calen_txdrv_sync2[1] ) , .qout ( cshi_so29 ) , .cshi_si2 ( cshi_so12 ) ) ; sync2_cell_152 sync2_cell_reg_cal_ops_calen_txintp_1 ( .clk ( ref_clk_cts_7 ) , .reset ( n728 ) , .sujuju ( 1'b0 ), .cshi_se ( cshi_se ) , .cshi_si ( cshi_so29 ) , .qout ( jcq_cal_ops_calen_txintp_sync2_1_ ) , .cshi_si1 ( jcq_cal_ops_calen_txsujuju_sync2_1_ ) ) ; sync2_cell_147 sync2_cell_reg_cal_ops_calen_txsujuju_0 ( .clk ( ref_clk_cts_3 ) , .reset ( n728 ) , .sujuju ( 1'b0 ), .cshi_se ( IN31 ) , .cshi_si ( jcq_cal_ops_calen_txclk_sync2[1] ) , .qout ( cshi_so13 ) , .cshi_si2 ( exten_mmslv_txintp_sync2 ) ) ; sync2_cell_148 sync2_cell_reg_cal_ops_calen_txsujuju_1 ( .clk ( ref_clk_cts_7 ) , .reset ( n728 ) , .sujuju ( 1'b0 ), .cshi_se ( n183 ) , .cshi_si ( cshi_so13 ) , .qout ( jcq_cal_ops_calen_txsujuju_sync2_1_ ) , .cshi_si2 ( fm_ana_sq_out_sync2 ) ) ; sync2_cell_145 sync2_cell_reg_cal_ops_calen_txclk_0 ( .clk ( net_ICC_CTS_1__G1B6I65 ) , .reset ( n728 ) , .sujuju ( 1'b0 ), .cshi_se ( n183 ) , .cshi_si ( jcq_cal_ops_calen_jsdsjul_sync2[1] ) , .qout ( jcq_cal_ops_calen_txclk_sync2[0] ) , .cshi_si2 ( jcq_cal_ops_calen_txclk_sync2[1] ) ) ; sync2_cell_146 sync2_cell_reg_cal_ops_calen_txclk_1 ( .clk ( net_ICC_CTS_1__G1B6I65 ) , .reset ( IN4 ) , .sujuju ( 1'b0 ), .cshi_se ( n183 ) , .cshi_si ( jcq_cal_ops_calen_txclk_sync2[0] ) , .qout ( jcq_cal_ops_calen_txclk_sync2[1] ) , .cshi_si1 ( slew_ctrl_en_sync2 ) ) ; sync2_cell_138 sync2_cell_fm_ana_sq_out (.clk ( ref_clk_cts_7 ) , .reset ( IN9 ) , .sujuju ( 1'b0 ), .cshi_se ( cshi_se ) , .cshi_si ( exten_mmslv_txintp_sync2 ) , .qout ( fm_ana_sq_out_sync2 ) , .cshi_si2 ( to_mni_lq_ivref_sync2 ) ) ; sync2_cell_167 sync2_cell_to_mni_lq_rx (.clk ( ref_clk_cts_1 ) , .reset ( IN10 ) , .sujuju ( to_mni_lq_rx ) , .cshi_se ( cshi_se ) , .cshi_si ( to_mni_lq_pll_sync2 ) , .qout ( to_mni_lq_rx_sync2 ) , .cshi_si2 ( MNI_IDLE_sync2 ) ) ; sync2_cell_143 sync2_cell_reg_cal_ops_calen_jsdsjul_0 ( .clk ( net_ICC_CTS_1__G1B6I65 ) , .reset ( n728 ) , .sujuju ( jcq_cal_ops_calen_jsdsjul[0] ) , .cshi_se ( IN48 ) , .cshi_si ( cshi_so8 ) , .qout ( jcq_cal_ops_calen_jsdsjul_sync2[0] ) , .cshi_si2 ( jcq_cal_ops_zzeddren_tx_force_sync2 ) ) ; sync2_cell_144 sync2_cell_reg_cal_ops_calen_jsdsjul_1 ( .clk ( net_ICC_CTS_1__G1B6I44 ) , .reset ( n728 ) , .sujuju ( jcq_cal_ops_calen_jsdsjul[1] ) , .cshi_se ( IN39 ) , .cshi_si ( jcq_cal_ops_calen_jsdsjul_sync2[0] ) , .qout ( jcq_cal_ops_calen_jsdsjul_sync2[1] ) , .cshi_si1 ( exten_mmslv_rxintp_sync2 ) ) ; sync2_cell_141 sync2_cell_reg_cal_ops_calen_rxintp_0 ( .clk ( net_ICC_CTS_1__G1B6I42 ) , .reset ( n728 ) , .sujuju ( jcq_cal_ops_calen_rxintp[0] ) , .cshi_se ( IN38 ) , .cshi_si ( jcq_cal_ops_calen_rxdig_sync2[1] ) , .qout ( cshi_so24 ) , .cshi_si2 ( cshi_so8 ) ) ; sync2_cell_142 sync2_cell_reg_cal_ops_calen_rxintp_1 ( .clk ( net_ICC_CTS_1__G1B6I42 ) , .reset ( n728 ) , .sujuju ( jcq_cal_ops_calen_rxintp[1] ) , .cshi_se ( IN36 ) , .cshi_si ( cshi_so24 ) , .qout ( cshi_so8 ) , .cshi_si1 ( cshi_si8 ) ) ; sync2_cell_139 sync2_cell_reg_cal_ops_calen_rxdig_0 ( .clk ( net_ICC_CTS_1__G1B6I44 ) , .reset ( IN8 ) , .sujuju ( jcq_cal_ops_calen_rxdig[0] ) , .cshi_se ( IN51 ) , .cshi_si ( fm_ana_sq_out_sync2 ) , .qout ( jcq_cal_ops_calen_rxdig_sync2[0] ) , .cshi_si1 ( jcq_cal_ops_zzeddren_tx_sync2_0_ ) ) ; sync2_cell_140 sync2_cell_reg_cal_ops_calen_rxdig_1 ( .clk ( net_ICC_CTS_1__G1B6I65 ) , .reset ( IN7 ) , .sujuju ( jcq_cal_ops_calen_rxdig[1] ) , .cshi_se ( IN45 ) , .cshi_si ( jcq_cal_ops_calen_rxdig_sync2[0] ) , .qout ( jcq_cal_ops_calen_rxdig_sync2[1] ) , .cshi_si2 ( cshi_so11 ) ) ; sync2_cell_149 sync2_cell_reg_cal_ops_calen_txdrv_0 (.clk ( ref_clk_cts_7 ) , .reset ( n728 ) , .sujuju ( 1'b0 ), .cshi_se ( IN32 ) , .cshi_si ( jcq_cal_ops_calen_txsujuju_sync2_1_ ) , .qout ( jcq_cal_ops_calen_txdrv_sync2[0] ) , .cshi_si2 ( cshi_si27 ) ) ; sync2_cell_150 sync2_cell_reg_cal_ops_calen_txdrv_1 (.clk ( ref_clk_cts_7 ) , .reset ( n728 ) , .sujuju ( 1'b0 ), .cshi_se ( IN33 ) , .cshi_si ( jcq_cal_ops_calen_txdrv_sync2[0] ) , .qout ( jcq_cal_ops_calen_txdrv_sync2[1] ) , .cshi_si1 ( jcq_cal_ops_calen_txintp_sync2_1_ ) ) ; sync2_cell_133 sync2_cell_exten_mmslv_jsdsjul ( .clk ( net_ICC_CTS_1__G1B6I44 ) , .reset ( IN3 ) , .sujuju ( exten_mmslv_jsdsjul ) , .cshi_se ( IN50 ) , .cshi_si ( exten_mmslv_rxintp_sync2 ) , .qout ( exten_mmslv_jsdsjul_sync2 ) , .cshi_si2 ( jcq_cal_ops_calen_rxdig_sync2[0] ) ) ; sync2_cell_132 sync2_cell_exten_mmslv_rxintp ( .clk ( net_ICC_CTS_1__G1B6I44 ) , .reset ( n728 ) , .sujuju ( exten_mmslv_rxintp ) , .cshi_se ( IN46 ) , .cshi_si ( exten_mmslv_rxdig_sync2 ) , .qout ( exten_mmslv_rxintp_sync2 ) ) ; sync2_cell_131 sync2_cell_exten_mmslv_rxdig ( .clk ( net_ICC_CTS_1__G1B6I44 ) , .reset ( n728 ) , .sujuju ( exten_mmslv_rxdig ) , .cshi_se ( IN47 ) , .cshi_si ( MNI_IDLE_sync2 ) , .qout ( exten_mmslv_rxdig_sync2 ) , .cshi_si2 ( exten_mmslv_jsdsjul_sync2 ) ) ; sync2_cell_136 sync2_cell_exten_mmslv_txdrv (.clk ( ref_clk ) , .reset ( n728 ) , .sujuju ( 1'b0 ), .cshi_se ( IN30 ) , .cshi_si ( cshi_so20 ) , .qout ( exten_mmslv_txdrv_sync2 ) , .cshi_so ( cshi_so1 ) , .IN0 ( exten_mmslv_txdrv_sync2 ) , .clk_cts_1 ( ref_clk_cts_3 ) , .cshi_si3 ( cshi_si26 ) , .cshi_si4 ( cshi_si33 ) ) ; sync2_cell_137 sync2_cell_exten_mmslv_txintp (.clk ( ref_clk_cts_1 ) , .reset ( n728 ) , .sujuju ( 1'b0 ), .cshi_se ( cshi_se ) , .cshi_si ( cshi_si2 ) , .qout ( exten_mmslv_txintp_sync2 ) ) ; sync2_cell_135 sync2_cell_exten_mmslv_txsujuju (.clk ( ref_clk_cts_9 ) , .reset ( n728 ) , .sujuju ( 1'b0 ), .cshi_se ( IN28 ) , .cshi_si ( cshi_so17 ) , .qout ( cshi_so20 ) , .cshi_si2 ( cshi_si17 ) ) ; sync2_cell_134 sync2_cell_exten_mmslv_txclk (.clk ( ref_clk_cts_9 ) , .reset ( n728 ) , .sujuju ( 1'b0 ), .cshi_se ( IN29 ) , .cshi_si ( exten_mmslv_jsdsjul_sync2 ) , .qout ( cshi_so17 ) , .cshi_si2 ( cshi_so20 ) ) ; sync2_cell_154 sync2_cell_reg_cal_ops_freeze_hsdlfuous ( .clk ( ref_clk_cts_2 ) , .reset ( IN2 ) , .sujuju ( jcq_cal_ops_freeze_hsdlfuous ) , .cshi_se ( IN43 ) , .cshi_si ( n673 ) , .qout ( cshi_so9 ) , .cshi_si2 ( cshi_si23 ) ) ; SCBUFX4 ICC_route12 (.A ( n852 ) , .Z ( n261 ) ) ; SCBUFX4 ICC_route11 (.A ( curr_state[9] ) , .Z ( n221 ) ) ; SCBUFX4 ICC_route10 (.A ( IN35 ) , .Z ( n190 ) ) ; SCBUFX4 ICC_route9 (.A ( cshi_se ) , .Z ( n183 ) ) ; SCBUFX4 ICC_route8 (.A ( n907 ) , .Z ( n182 ) ) ; SCBUFX4 ICC_route7 (.A ( n22 ) , .Z ( n181 ) ) ; SBUFX4 ICC_route6 (.Z ( n68 ) , .A ( n755 ) ) ; SCBUFX4 ICC_route5 (.A ( n398 ) , .Z ( n64 ) ) ; SCBUFX4 ICC_route4 (.A ( n394 ) , .Z ( n63 ) ) ; SCBUFX4 ICC_route3 (.A ( IN27 ) , .Z ( n48 ) ) ; SCBUFX4 ICC_route2 (.A ( IN37 ) , .Z ( n37 ) ) ; SIVX4 place_57 (.A ( n728 ) , .Z ( n755 ) ) ; SIVX4 place_55 (.A ( n728 ) , .Z ( n730 ) ) ; SCBUFX4 ICC_route1 (.A ( n730 ) , .Z ( n22 ) ) ; SNN2BX4 U360 (.B ( n687 ) , .Z ( n671 ) , .A ( jcq_ops_cal_read[2] ) ) ; SCBUFX4 cts_psyn_1 (.A ( cshi_si30 ) , .Z ( n639 ) ) ; SAO222X4 U636 (.A1 ( zzeddr_in[0] ) , .A0 ( n377 ) , .Z ( PROCESS_VALUE[0] ) , .C1 ( zzeddr_in[1] ) , .C0 ( n365 ) , .B0 ( n460 ) , .B1 ( jcq_cal_ops_zzeddr_value_default[0] ) ) ; SNR2Z1X4 place_21 (.Z ( n928 ) , .A ( n281 ) , .B ( n223 ) ) ; SNN2Z1X4 U11 (.A ( n87 ) , .Z ( n162 ) , .B ( n99 ) ) ; SOAI22X4 U437 (.A1 ( n124 ) , .A0 ( n125 ) , .Z ( n135 ) , .B0 ( n118 ) , .B1 ( n119 ) ) ; SAN3X4 U182 (.Z ( n555 ) , .C ( zzeddr_rerun_time_cnt[7] ) , .B ( zzeddr_rerun_time_cnt[6] ) , .A ( n273 ) ) ; SNR2Z1X4 U8 (.B ( n210 ) , .Z ( n94 ) , .A ( n774 ) ) ; SNR2Z1X4 place_22 (.A ( n223 ) , .B ( n284 ) , .Z ( n929 ) ) ; SNN2BX4 U466 (.B ( n175 ) , .Z ( n191 ) , .A ( n176 ) ) ; SNR3X4 U470 (.Z ( n646 ) , .A ( n188 ) , .B ( n187 ) , .C ( n186 ) ) ; SNN3X4 U424 (.A ( cshi_so16 ) , .Z ( n597 ) , .B ( timeout_jsu_0_ ) , .C ( timeout_jsu_2_ ) ) ; SIVX4 U41 (.Z ( n347 ) , .A ( n224 ) ) ; SNN2Z1X4 U76 (.A ( n155 ) , .Z ( n625 ) , .B ( n154 ) ) ; SOAI32X4 U837 (.A1 ( n655 ) , .Z ( n657 ) , .A0 ( n666 ) , .B0 ( n655 ) , .B1 ( cshi_so20 ) , .B2 ( txsujuju_st_done ) ) ; SOAI21X4 U838 (.B0 ( exten_mmslv_jsdsjul_sync2 ) , .B1 ( cshi_so27 ) , .Z ( n656 ) , .A ( n668 ) ) ; SOAI211X4 U839 (.A ( n657 ) , .Z ( jcq_rd_ops_results[1] ) , .B ( n656 ) , .C1 ( n671 ) , .C0 ( n658 ) ) ; SAOI222X4 U840 (.C0 ( LVSEL_TXCLK[0] ) , .C1 ( n659 ) , .A0 ( LVSEL_TXSUJUJU[0] ) , .Z ( n672 ) , .A1 ( n660 ) , .B1 ( LVSEL_TXWHTH[0] ) , .B0 ( n662 ) ) ; SAOI22X4 U841 (.A1 ( n991 ) , .Z ( n665 ) , .A0 ( n660 ) , .B0 ( n659 ) , .B1 ( IN0 ) ) ; SAOI22X4 U842 (.A1 ( n986 ) , .Z ( n664 ) , .A0 ( n662 ) , .B0 ( n661 ) , .B1 ( LVSEL_TXDRV[0] ) ) ; SAOI21Z0X4 U843 (.Z ( n667 ) , .A ( n663 ) , .B0 ( n665 ) , .B1 ( n664 ) ) ; SOAI32X4 U844 (.A1 ( n667 ) , .Z ( n670 ) , .A0 ( n666 ) , .B0 ( n667 ) , .B1 ( cshi_so17 ) , .B2 ( txclk_st_done ) ) ; SOAI21X4 U845 (.B0 ( exten_mmslv_rxintp_sync2 ) , .B1 ( rxintp_st_done ) , .Z ( n669 ) , .A ( n668 ) ) ; SOAI211X4 U846 (.A ( n670 ) , .Z ( jcq_rd_ops_results[0] ) , .B ( n669 ) , .C1 ( n671 ) , .C0 ( n672 ) ) ; SDFNX4 LOCKUP (.CKB ( ref_clk ) , .Q ( cshi_so5 ) , .D ( n639 ) ) ; SDFNX4 LOCKUP1 (.CKB ( ref_clk ) , .Q ( cshi_so6 ) , .D ( cshi_si34 ) ) ; SAOI21X4 U744 (.Z ( n506 ) , .A ( n514 ) , .B0 ( n515 ) , .B1 ( n507 ) ) ; SIVX4 U745 (.Z ( n547 ) , .A ( HIOPSR_jsu_1M_div1024_4_ ) ) ; SOAI32X4 U746 (.A1 ( n547 ) , .Z ( n876 ) , .A0 ( n506 ) , .B0 ( HIOPSR_jsu_1M_div1024_4_ ) , .B1 ( n912 ) , .B2 ( n505 ) ) ; SOAI32X4 U747 (.A1 ( n543 ) , .Z ( n875 ) , .A0 ( n506 ) , .B0 ( cshi_so22 ) , .B1 ( n912 ) , .B2 ( n507 ) ) ; SIVX4 U748 (.Z ( n510 ) , .A ( n508 ) ) ; SAOI21X4 U749 (.Z ( n511 ) , .A ( n514 ) , .B0 ( n515 ) , .B1 ( n512 ) ) ; SIVX4 U750 (.Z ( n509 ) , .A ( cshi_so36 ) ) ; SOAI32X4 U751 (.A1 ( n509 ) , .Z ( n874 ) , .A0 ( n511 ) , .B0 ( cshi_so36 ) , .B1 ( n912 ) , .B2 ( n510 ) ) ; SOAI32X4 U752 (.A1 ( n544 ) , .Z ( n873 ) , .A0 ( n511 ) , .B0 ( cshi_so21 ) , .B1 ( n912 ) , .B2 ( n512 ) ) ; SAOI21X4 U754 (.Z ( n518 ) , .A ( n514 ) , .B0 ( n517 ) , .B1 ( n515 ) ) ; SNN2X4 U755 (.A ( n515 ) , .Z ( n516 ) , .B ( n580 ) ) ; SOAI22X4 U756 (.A1 ( n518 ) , .A0 ( n580 ) , .Z ( n871 ) , .B0 ( n517 ) , .B1 ( n516 ) ) ; SNR4BX4 U757 (.B3 ( n523 ) , .ZN ( n550 ) , .B2 ( cshi_so28 ) , .B1 ( cshi_so12 ) , .A1 ( n520 ) ) ; SNR4X4 U758 (.A ( cshi_so28 ) , .B ( n522 ) , .Z ( n525 ) , .C ( n521 ) , .D ( n523 ) ) ; SNR4BX4 U759 (.B3 ( n523 ) , .ZN ( n536 ) , .B2 ( n524 ) , .B1 ( cshi_so12 ) , .A1 ( cshi_so28 ) ) ; SAOI222X4 U760 (.C0 ( HIOPSR_jsu_1M_div128_5_ ) , .C1 ( n536 ) , .A0 ( HIOPSR_jsu_1M_div1024_8_ ) , .Z ( n553 ) , .A1 ( n550 ) , .B1 ( n525 ) , .B0 ( HIOPSR_jsu_1M_div8[1] ) ) ; SNR4X4 U762 (.A ( n760 ) , .B ( n550 ) , .Z ( n539 ) , .C ( n536 ) , .D ( n411 ) ) ; SAOI21X4 U763 (.Z ( n527 ) , .A ( HIOPSR_jsu_1M_div8[2] ) , .B0 ( HIOPSR_jsu_1M_div8[1] ) , .B1 ( HIOPSR_jsu_1M_div8[0] ) ) ; SNR2X4 U764 (.B ( n527 ) , .Z ( n538 ) , .A ( n901 ) ) ; SNN4X4 U765 (.A ( n531 ) , .Z ( n532 ) , .B ( n530 ) , .D ( n528 ) , .C ( n529 ) ) ; SOAI32X4 U766 (.A1 ( HIOPSR_jsu_1M_div128_6_ ) , .Z ( n535 ) , .A0 ( HIOPSR_jsu_1M_div128_5_ ) , .B0 ( HIOPSR_jsu_1M_div128_6_ ) , .B1 ( HIOPSR_jsu_1M_div128_3_ ) , .B2 ( n532 ) ) ; SOAI2B2X4 U767 (.A0 ( n536 ) , .A1 ( n535 ) , .Z ( n537 ) , .B0 ( n534 ) , .B1 ( n676 ) ) ; SAOI211X4 U768 (.A ( n538 ) , .Z ( n552 ) , .B ( n537 ) , .C0 ( n901 ) , .C1 ( n539 ) ) ; SNN4X4 U769 (.A ( n544 ) , .Z ( n545 ) , .B ( n543 ) , .D ( n541 ) , .C ( n542 ) ) ; SNR4X4 U770 (.A ( HIOPSR_jsu_1M_div1024_9_ ) , .B ( cshi_so36 ) , .Z ( n548 ) , .C ( HIOPSR_jsu_1M_div1024_0_ ) , .D ( n545 ) ) ; SNN3X4 U771 (.A ( n548 ) , .Z ( n549 ) , .B ( n547 ) , .C ( n546 ) ) ; SOAI211X4 U772 (.A ( n550 ) , .Z ( n551 ) , .B ( n549 ) , .C1 ( HIOPSR_jsu_1M_div1024_8_ ) , .C0 ( HIOPSR_jsu_1M_div1024_9_ ) ) ; SOAI211X4 U773 (.A ( n552 ) , .Z ( n870 ) , .B ( n551 ) , .C1 ( n553 ) , .C0 ( int_HIOPSR ) ) ; SAOI21X4 U774 (.Z ( n557 ) , .A ( n907 ) , .B0 ( n555 ) , .B1 ( n772 ) ) ; SIVX4 U775 (.Z ( n559 ) , .A ( zzeddr_rerun_time_cnt[0] ) ) ; SAOI22X4 U776 (.A1 ( n557 ) , .Z ( n868 ) , .A0 ( zzeddr_rerun_time_cnt[0] ) , .B0 ( n556 ) , .B1 ( n559 ) ) ; SNR2X4 U777 (.B ( n556 ) , .Z ( n558 ) , .A ( zzeddr_rerun_time_cnt[0] ) ) ; SNR2X4 U778 (.B ( n572 ) , .Z ( n564 ) , .A ( n558 ) ) ; SIVX4 U779 (.Z ( n560 ) , .A ( zzeddr_rerun_time_cnt[1] ) ) ; SNN2X4 U780 (.A ( n915 ) , .Z ( n563 ) , .B ( n560 ) ) ; SOAI22X4 U781 (.A1 ( n560 ) , .A0 ( n564 ) , .Z ( n867 ) , .B0 ( n559 ) , .B1 ( n563 ) ) ; SNN3X4 U782 (.A ( zzeddr_rerun_time_cnt[1] ) , .Z ( n562 ) , .B ( zzeddr_rerun_time_cnt[0] ) , .C ( n915 ) ) ; SIVX4 U783 (.Z ( n561 ) , .A ( zzeddr_rerun_time_cnt[2] ) ) ; SAOI32X4 U784 (.A1 ( n561 ) , .B2 ( n563 ) , .Z ( n866 ) , .A0 ( n562 ) , .B0 ( n564 ) , .B1 ( zzeddr_rerun_time_cnt[2] ) ) ; SAOI21X4 U785 (.Z ( n571 ) , .A ( n572 ) , .B0 ( n915 ) , .B1 ( n565 ) ) ; SIVX4 U786 (.Z ( n566 ) , .A ( zzeddr_rerun_time_cnt[3] ) ) ; SNN2X4 U787 (.A ( n915 ) , .Z ( n570 ) , .B ( n566 ) ) ; SOAI22X4 U788 (.A1 ( n566 ) , .A0 ( n571 ) , .Z ( n865 ) , .B0 ( n565 ) , .B1 ( n570 ) ) ; SNN3X4 U789 (.A ( n567 ) , .Z ( n569 ) , .B ( zzeddr_rerun_time_cnt[3] ) , .C ( n915 ) ) ; SIVX4 U790 (.Z ( n568 ) , .A ( zzeddr_rerun_time_cnt[4] ) ) ; SAOI32X4 U791 (.A1 ( n568 ) , .B2 ( n570 ) , .Z ( n864 ) , .A0 ( n569 ) , .B0 ( n571 ) , .B1 ( zzeddr_rerun_time_cnt[4] ) ) ; SAOI21X4 U792 (.Z ( n579 ) , .A ( n572 ) , .B0 ( n915 ) , .B1 ( n574 ) ) ; SNN2X4 U793 (.A ( n915 ) , .Z ( n578 ) , .B ( n575 ) ) ; SOAI22X4 U794 (.A1 ( n575 ) , .A0 ( n579 ) , .Z ( n863 ) , .B0 ( n574 ) , .B1 ( n578 ) ) ; SAOI32X4 U795 (.A1 ( n576 ) , .B2 ( n578 ) , .Z ( n862 ) , .A0 ( n577 ) , .B0 ( n579 ) , .B1 ( zzeddr_rerun_time_cnt[6] ) ) ; SOAI22X4 U796 (.A1 ( n582 ) , .A0 ( n906 ) , .Z ( n861 ) , .B0 ( n411 ) , .B1 ( n926 ) ) ; SIVX4 U797 (.Z ( n584 ) , .A ( int_hiopsr_d2 ) ) ; SOAI22X4 U798 (.A1 ( n581 ) , .A0 ( n906 ) , .Z ( n860 ) , .B0 ( n926 ) , .B1 ( n584 ) ) ; SOAI22X4 U799 (.A1 ( n584 ) , .A0 ( n906 ) , .Z ( n859 ) , .B0 ( n926 ) , .B1 ( n582 ) ) ; SIVX4 U800 (.Z ( n598 ) , .A ( timeout_jsu_3_ ) ) ; SNN3X4 U801 (.A ( timeout_jsu_3_ ) , .Z ( n587 ) , .B ( n585 ) , .C ( n591 ) ) ; SAOI32X4 U802 (.A1 ( n586 ) , .B2 ( n596 ) , .Z ( n855 ) , .A0 ( n587 ) , .B0 ( n599 ) , .B1 ( timeout_jsu_4_ ) ) ; SIVX4 U803 (.Z ( n590 ) , .A ( cshi_so16 ) ) ; SOAI22X4 U804 (.A1 ( n590 ) , .A0 ( n595 ) , .Z ( n853 ) , .B0 ( n589 ) , .B1 ( n594 ) ) ; SNN3X4 U805 (.A ( cshi_so16 ) , .Z ( n593 ) , .B ( timeout_jsu_0_ ) , .C ( n591 ) ) ; SIVX4 U806 (.Z ( n592 ) , .A ( timeout_jsu_2_ ) ) ; SAOI32X4 U807 (.A1 ( n592 ) , .B2 ( n594 ) , .Z ( n852 ) , .A0 ( n593 ) , .B0 ( n595 ) , .B1 ( timeout_jsu_2_ ) ) ; SOAI22X4 U808 (.A1 ( n598 ) , .A0 ( n599 ) , .Z ( n851 ) , .B0 ( n597 ) , .B1 ( n596 ) ) ; SOAI32X4 U809 (.A1 ( n603 ) , .Z ( n813 ) , .A0 ( n600 ) , .B0 ( n603 ) , .B1 ( n602 ) , .B2 ( n601 ) ) ; SAOI22X4 U810 (.A1 ( n605 ) , .Z ( n801 ) , .A0 ( n906 ) , .B0 ( n604 ) , .B1 ( n907 ) ) ; SAOI22X4 U811 (.A1 ( n607 ) , .Z ( n799 ) , .A0 ( n906 ) , .B0 ( n606 ) , .B1 ( n907 ) ) ; SAOI22AX4 U812 (.A1 ( n620 ) , .Z ( n798 ) , .A0 ( n758 ) , .B0 ( n609 ) , .B1 ( n759 ) ) ; SAOI22X4 U813 (.A1 ( n612 ) , .Z ( n792 ) , .A0 ( n906 ) , .B0 ( n611 ) , .B1 ( n907 ) ) ; SAOI32X4 U814 (.A1 ( txclk_st_done ) , .B2 ( n614 ) , .Z ( n615 ) , .A0 ( n907 ) , .B0 ( n770 ) , .B1 ( txclk_st_done ) ) ; SOAI31X4 U815 (.Z ( n786 ) , .A ( n615 ) , .B0 ( n927 ) , .B1 ( n616 ) , .B2 ( n916 ) ) ; SAOI32X4 U816 (.A1 ( txsujuju_st_done ) , .B2 ( n618 ) , .Z ( n619 ) , .A0 ( n907 ) , .B0 ( n770 ) , .B1 ( txsujuju_st_done ) ) ; SOAI31AX4 U817 (.Z ( n785 ) , .A ( n619 ) , .B0 ( n929 ) , .B1 ( n620 ) , .B2 ( n916 ) ) ; SAOI32X4 U818 (.A1 ( txintp_st_done ) , .B2 ( n622 ) , .Z ( n623 ) , .A0 ( n907 ) , .B0 ( n770 ) , .B1 ( txintp_st_done ) ) ; SOAI31X4 U819 (.Z ( n784 ) , .A ( n623 ) , .B0 ( n625 ) , .B1 ( n624 ) , .B2 ( n916 ) ) ; SAOI32X4 U820 (.A1 ( txdrv_st_done ) , .B2 ( n626 ) , .Z ( n627 ) , .A0 ( n907 ) , .B0 ( n770 ) , .B1 ( txdrv_st_done ) ) ; SOAI31X4 U821 (.Z ( n783 ) , .A ( n627 ) , .B0 ( n925 ) , .B1 ( n628 ) , .B2 ( n916 ) ) ; SAOI32X4 U822 (.A1 ( rxdig_st_done ) , .B2 ( n630 ) , .Z ( n631 ) , .A0 ( n907 ) , .B0 ( n770 ) , .B1 ( rxdig_st_done ) ) ; SOAI31X4 U823 (.Z ( n782 ) , .A ( n631 ) , .B0 ( n633 ) , .B1 ( n632 ) , .B2 ( n916 ) ) ; SAOI32X4 U824 (.A1 ( rxintp_st_done ) , .B2 ( n634 ) , .Z ( n635 ) , .A0 ( n907 ) , .B0 ( n770 ) , .B1 ( rxintp_st_done ) ) ; SOAI31X4 U825 (.Z ( n781 ) , .A ( n635 ) , .B0 ( n637 ) , .B1 ( n636 ) , .B2 ( n916 ) ) ; SAOI32X4 U826 (.A1 ( cshi_so27 ) , .B2 ( n638 ) , .Z ( n640 ) , .A0 ( n907 ) , .B0 ( n770 ) , .B1 ( cshi_so27 ) ) ; SOAI31X4 U827 (.Z ( n780 ) , .A ( n640 ) , .B0 ( n643 ) , .B1 ( n642 ) , .B2 ( n916 ) ) ; SAOI22X4 U828 (.A1 ( n646 ) , .Z ( n779 ) , .A0 ( n906 ) , .B0 ( n645 ) , .B1 ( n907 ) ) ; SAOI22X4 U829 (.A1 ( LVSEL_RXWHTH[2] ) , .Z ( n649 ) , .A0 ( n660 ) , .B0 ( n659 ) , .B1 ( LVSEL_RXDIG[2] ) ) ; SAOI22X4 U830 (.A1 ( LVSEL_JSDSJUL[2] ) , .Z ( n648 ) , .A0 ( n662 ) , .B0 ( n661 ) , .B1 ( LVSEL_TXDRV[2] ) ) ; SAOI21Z0X4 U831 (.Z ( n650 ) , .A ( n663 ) , .B0 ( n649 ) , .B1 ( n648 ) ) ; SOAI32X4 U832 (.A1 ( n650 ) , .Z ( n651 ) , .A0 ( n666 ) , .B0 ( n650 ) , .B1 ( exten_mmslv_txintp_sync2 ) , .B2 ( txintp_st_done ) ) ; SOAI31AX4 U833 (.Z ( jcq_rd_ops_results[2] ) , .A ( n651 ) , .B0 ( jcq_ops_cal_read[2] ) , .B1 ( jcq_ops_cal_read[3] ) , .B2 ( n652 ) ) ; SAOI22X4 U834 (.A1 ( IN1 ) , .Z ( n654 ) , .A0 ( n660 ) , .B0 ( n659 ) , .B1 ( n990 ) ) ; SAOI22X4 U835 (.A1 ( n32 ) , .Z ( n653 ) , .A0 ( n662 ) , .B0 ( n661 ) , .B1 ( LVSEL_TXDRV[1] ) ) ; SAOI21Z0X4 U836 (.Z ( n655 ) , .A ( n663 ) , .B0 ( n654 ) , .B1 ( n653 ) ) ; SAN2X4 U650 (.Z ( n454 ) , .B ( n895 ) , .A ( exten_guoche_rxintp ) ) ; SAOI22X4 U651 (.A1 ( n455 ) , .Z ( n381 ) , .A0 ( ext_mmslv_jsdsjul[4] ) , .B0 ( ext_mmslv_rxintp[4] ) , .B1 ( n454 ) ) ; SAOI21Z0X4 U653 (.Z ( n379 ) , .A ( n776 ) , .B0 ( n914 ) , .B1 ( n448 ) ) ; SAOI21X4 U654 (.Z ( n380 ) , .A ( n379 ) , .B0 ( jcq_cal_ops_zzeddr_value_default[3] ) , .B1 ( n460 ) ) ; SOAI211X4 U655 (.A ( n381 ) , .Z ( PROCESS_VALUE[3] ) , .B ( n380 ) , .C1 ( n456 ) , .C0 ( n382 ) ) ; SAOI211X4 U656 (.A ( n384 ) , .Z ( n386 ) , .B ( n406 ) , .C0 ( n760 ) , .C1 ( n612 ) ) ; SOA22BBX4 U657 (.A2 ( n385 ) , .ZN ( n395 ) , .A1 ( n907 ) , .B2 ( n386 ) , .B1 ( n904 ) ) ; SOAI211X4 U658 (.A ( n395 ) , .Z ( n393 ) , .B ( n647 ) , .C1 ( n622 ) , .C0 ( n907 ) ) ; SOAI22X4 U659 (.A1 ( n395 ) , .A0 ( n923 ) , .Z ( n830 ) , .B0 ( n415 ) , .B1 ( n393 ) ) ; SOAI22X4 U660 (.A1 ( n395 ) , .A0 ( n922 ) , .Z ( n829 ) , .B0 ( n389 ) , .B1 ( n393 ) ) ; SOAI22X4 U661 (.A1 ( n395 ) , .A0 ( n416 ) , .Z ( n828 ) , .B0 ( n390 ) , .B1 ( n393 ) ) ; SOAI22X4 U662 (.A1 ( n921 ) , .A0 ( n395 ) , .Z ( n827 ) , .B0 ( n392 ) , .B1 ( n393 ) ) ; SOAI22X4 U663 (.A1 ( n421 ) , .A0 ( n395 ) , .Z ( n826 ) , .B0 ( n404 ) , .B1 ( n393 ) ) ; SAOI2B11X4 U664 (.C0 ( n929 ) , .A ( n620 ) , .Z ( n397 ) , .B ( n406 ) , .C1 ( n760 ) ) ; SOA22BBX4 U665 (.A2 ( n396 ) , .ZN ( n405 ) , .A1 ( n907 ) , .B2 ( n397 ) , .B1 ( n430 ) ) ; SOAI211X4 U666 (.A ( n405 ) , .Z ( n403 ) , .B ( n644 ) , .C1 ( n618 ) , .C0 ( n907 ) ) ; SOAI22X4 U667 (.A1 ( n405 ) , .A0 ( n923 ) , .Z ( n825 ) , .B0 ( n418 ) , .B1 ( n403 ) ) ; SOAI22X4 U668 (.A1 ( n922 ) , .A0 ( n405 ) , .Z ( n824 ) , .B0 ( n425 ) , .B1 ( n403 ) ) ; SOAI22X4 U669 (.A1 ( n416 ) , .A0 ( n405 ) , .Z ( n823 ) , .B0 ( n426 ) , .B1 ( n403 ) ) ; SOAI22X4 U670 (.A1 ( n921 ) , .A0 ( n405 ) , .Z ( n822 ) , .B0 ( n402 ) , .B1 ( n403 ) ) ; SOAI22X4 U671 (.A1 ( n421 ) , .A0 ( n405 ) , .Z ( n821 ) , .B0 ( n554 ) , .B1 ( n403 ) ) ; SAOI2B11X4 U672 (.C0 ( n927 ) , .A ( n427 ) , .Z ( n409 ) , .B ( n406 ) , .C1 ( n760 ) ) ; SOA22BBX4 U673 (.A2 ( n407 ) , .ZN ( n422 ) , .A1 ( n907 ) , .B2 ( n409 ) , .B1 ( n773 ) ) ; SOAI211X4 U674 (.A ( n422 ) , .Z ( n419 ) , .B ( n641 ) , .C1 ( n614 ) , .C0 ( n907 ) ) ; SOAI22X4 U675 (.A1 ( n422 ) , .A0 ( n923 ) , .Z ( n820 ) , .B0 ( n420 ) , .B1 ( n419 ) ) ; SOAI22X4 U676 (.A1 ( n422 ) , .A0 ( n922 ) , .Z ( n819 ) , .B0 ( n413 ) , .B1 ( n419 ) ) ; SOAI22X4 U677 (.A1 ( n422 ) , .A0 ( n416 ) , .Z ( n818 ) , .B0 ( n429 ) , .B1 ( n419 ) ) ; SOAI22X4 U678 (.A1 ( n921 ) , .A0 ( n422 ) , .Z ( n817 ) , .B0 ( n417 ) , .B1 ( n419 ) ) ; SOAI22X4 U679 (.A1 ( n421 ) , .A0 ( n422 ) , .Z ( n816 ) , .B0 ( n540 ) , .B1 ( n419 ) ) ; SIVX4 U684 (.Z ( n609 ) , .A ( dly_curr_txsujuju_st ) ) ; SAOI22X4 U691 (.A1 ( n905 ) , .Z ( n441 ) , .A0 ( n760 ) , .B0 ( dly_curr_rxdig_st ) , .B1 ( n534 ) ) ; SOAI21X4 U692 (.B0 ( n442 ) , .B1 ( n441 ) , .Z ( HEEN_OPS_RXDIG ) , .A ( n909 ) ) ; SAOI22X4 U693 (.A1 ( n902 ) , .Z ( n445 ) , .A0 ( n760 ) , .B0 ( dly_curr_jsdsjul_st ) , .B1 ( n534 ) ) ; SOAI31AX4 U694 (.Z ( HEEN_OPS_JSDSJUL ) , .A ( n444 ) , .B0 ( n447 ) , .B1 ( n674 ) , .B2 ( n445 ) ) ; SAOI22X4 U695 (.A1 ( n455 ) , .Z ( n452 ) , .A0 ( ext_mmslv_jsdsjul[2] ) , .B0 ( ext_mmslv_rxintp[2] ) , .B1 ( n454 ) ) ; SOAI22X4 U696 (.A1 ( n777 ) , .A0 ( n914 ) , .Z ( n450 ) , .B0 ( n463 ) , .B1 ( n448 ) ) ; SAOI21X4 U697 (.Z ( n451 ) , .A ( n450 ) , .B0 ( jcq_cal_ops_zzeddr_value_default[1] ) , .B1 ( n460 ) ) ; SOAI211X4 U698 (.A ( n452 ) , .Z ( PROCESS_VALUE[1] ) , .B ( n451 ) , .C1 ( n456 ) , .C0 ( n704 ) ) ; SAOI22X4 U699 (.A1 ( n455 ) , .Z ( n462 ) , .A0 ( ext_mmslv_jsdsjul[3] ) , .B0 ( ext_mmslv_rxintp[3] ) , .B1 ( n454 ) ) ; SOAI22X4 U700 (.A1 ( n900 ) , .A0 ( n620 ) , .Z ( n459 ) , .B0 ( n702 ) , .B1 ( n456 ) ) ; SAOI21X4 U701 (.Z ( n461 ) , .A ( n459 ) , .B0 ( jcq_cal_ops_zzeddr_value_default[2] ) , .B1 ( n460 ) ) ; SOAI211X4 U702 (.A ( n462 ) , .Z ( PROCESS_VALUE[2] ) , .B ( n461 ) , .C1 ( n463 ) , .C0 ( n914 ) ) ; SNR2BX4 U703 (.Z ( n469 ) , .B ( n465 ) , .A ( n466 ) ) ; SOAI22X4 U705 (.A1 ( n676 ) , .A0 ( n469 ) , .Z ( n890 ) , .B0 ( n468 ) , .B1 ( n467 ) ) ; SIVX4 U706 (.Z ( n475 ) , .A ( HIOPSR_jsu_1M_div8[1] ) ) ; SAOI21X4 U707 (.Z ( n473 ) , .A ( n470 ) , .B0 ( n471 ) , .B1 ( n475 ) ) ; SIVX4 U708 (.Z ( n472 ) , .A ( HIOPSR_jsu_1M_div8[2] ) ) ; SOAI32X4 U709 (.A1 ( n472 ) , .Z ( n888 ) , .A0 ( n473 ) , .B0 ( HIOPSR_jsu_1M_div8[2] ) , .B1 ( n475 ) , .B2 ( n474 ) ) ; SIVX4 U710 (.Z ( n531 ) , .A ( cshi_so35 ) ) ; SAOI21X4 U711 (.Z ( n478 ) , .A ( n476 ) , .B0 ( n479 ) , .B1 ( n531 ) ) ; SAOI21X4 U712 (.Z ( n477 ) , .A ( n489 ) , .B0 ( n479 ) , .B1 ( n676 ) ) ; SOAI22X4 U713 (.A1 ( n676 ) , .A0 ( n478 ) , .Z ( n887 ) , .B0 ( n477 ) , .B1 ( n531 ) ) ; SNN2X4 U714 (.A ( IN25 ) , .Z ( n480 ) , .B ( cshi_so35 ) ) ; SAOI21X4 U715 (.Z ( n481 ) , .A ( n489 ) , .B0 ( n479 ) , .B1 ( n482 ) ) ; SIVX4 U716 (.Z ( n530 ) , .A ( HIOPSR_jsu_1M_div128_1_ ) ) ; SOAI32X4 U717 (.A1 ( n530 ) , .Z ( n886 ) , .A0 ( n481 ) , .B0 ( HIOPSR_jsu_1M_div128_1_ ) , .B1 ( n913 ) , .B2 ( n480 ) ) ; SOAI32X4 U718 (.A1 ( n529 ) , .Z ( n885 ) , .A0 ( n481 ) , .B0 ( HIOPSR_jsu_1M_div128_2_ ) , .B1 ( n913 ) , .B2 ( n482 ) ) ; SNN2BX4 U719 (.B ( HIOPSR_jsu_1M_div128_2_ ) , .Z ( n485 ) , .A ( n482 ) ) ; SNR2X4 U720 (.B ( n913 ) , .Z ( n483 ) , .A ( n488 ) ) ; SNR2X4 U721 (.B ( n483 ) , .Z ( n486 ) , .A ( n489 ) ) ; SOAI32X4 U722 (.A1 ( n484 ) , .Z ( n884 ) , .A0 ( n486 ) , .B0 ( HIOPSR_jsu_1M_div128_3_ ) , .B1 ( n913 ) , .B2 ( n485 ) ) ; SIVX4 U724 (.Z ( n528 ) , .A ( HIOPSR_jsu_1M_div128_4_ ) ) ; SOAI32X4 U725 (.A1 ( n528 ) , .Z ( n883 ) , .A0 ( n486 ) , .B0 ( HIOPSR_jsu_1M_div128_4_ ) , .B1 ( n913 ) , .B2 ( n762 ) ) ; SNN3X4 U726 (.A ( n488 ) , .Z ( n493 ) , .B ( HIOPSR_jsu_1M_div128_4_ ) , .C ( HIOPSR_jsu_1M_div128_5_ ) ) ; SNR2BX4 U727 (.Z ( n492 ) , .B ( n489 ) , .A ( n490 ) ) ; SIVX4 U728 (.Z ( n491 ) , .A ( HIOPSR_jsu_1M_div128_6_ ) ) ; SOAI32X4 U729 (.A1 ( n491 ) , .Z ( n881 ) , .A0 ( n492 ) , .B0 ( HIOPSR_jsu_1M_div128_6_ ) , .B1 ( n913 ) , .B2 ( n493 ) ) ; SAOI21X4 U730 (.Z ( n500 ) , .A ( n514 ) , .B0 ( n515 ) , .B1 ( n676 ) ) ; SIVX4 U731 (.Z ( n497 ) , .A ( HIOPSR_jsu_1M_div1024_0_ ) ) ; SNN2X4 U732 (.A ( n515 ) , .Z ( n499 ) , .B ( n497 ) ) ; SNR2BX4 U733 (.Z ( n496 ) , .B ( n495 ) , .A ( n499 ) ) ; SOAI22X4 U734 (.A1 ( n497 ) , .A0 ( n500 ) , .Z ( n880 ) , .B0 ( n496 ) , .B1 ( n676 ) ) ; SNN3X4 U735 (.A ( n515 ) , .Z ( n498 ) , .B ( IN25 ) , .C ( HIOPSR_jsu_1M_div1024_0_ ) ) ; SIVX4 U736 (.Z ( n541 ) , .A ( HIOPSR_jsu_1M_div1024_1_ ) ) ; SAOI32X4 U737 (.A1 ( n541 ) , .B2 ( n499 ) , .Z ( n879 ) , .A0 ( n498 ) , .B0 ( n500 ) , .B1 ( HIOPSR_jsu_1M_div1024_1_ ) ) ; SNN3X4 U738 (.A ( IN25 ) , .Z ( n501 ) , .B ( HIOPSR_jsu_1M_div1024_1_ ) , .C ( HIOPSR_jsu_1M_div1024_0_ ) ) ; SAOI21X4 U739 (.Z ( n502 ) , .A ( n514 ) , .B0 ( n515 ) , .B1 ( n503 ) ) ; SIVX4 U740 (.Z ( n546 ) , .A ( HIOPSR_jsu_1M_div1024_2_ ) ) ; SOAI32X4 U741 (.A1 ( n546 ) , .Z ( n878 ) , .A0 ( n502 ) , .B0 ( HIOPSR_jsu_1M_div1024_2_ ) , .B1 ( n912 ) , .B2 ( n501 ) ) ; SOAI32X4 U742 (.A1 ( n542 ) , .Z ( n877 ) , .A0 ( n502 ) , .B0 ( HIOPSR_jsu_1M_div1024_3_ ) , .B1 ( n912 ) , .B2 ( n503 ) ) ; SIVX4 U743 (.Z ( n505 ) , .A ( n504 ) ) ; SIVX4 U557 (.Z ( n484 ) , .A ( HIOPSR_jsu_1M_div128_3_ ) ) ; SNR3X4 U558 (.Z ( n488 ) , .A ( n482 ) , .B ( n529 ) , .C ( n484 ) ) ; SAOI21X4 U559 (.Z ( n272 ) , .A ( HIOPSR_jsu_1M_div128_5_ ) , .B0 ( HIOPSR_jsu_1M_div128_4_ ) , .B1 ( n488 ) ) ; SNR4X4 U560 (.A ( micho_1m_jsu_6_ ) , .B ( cshi_so19 ) , .Z ( n270 ) , .C ( cshi_so32 ) , .D ( micho_1m_jsu_3_ ) ) ; SOAI211X4 U561 (.A ( n275 ) , .Z ( n271 ) , .B ( n524 ) , .C1 ( micho_1m_jsu_0_ ) , .C0 ( n276 ) ) ; SNR2Z1X4 U562 (.B ( n271 ) , .Z ( n479 ) , .A ( n759 ) ) ; SAO31X4 U563 (.Z ( n490 ) , .B2 ( n488 ) , .B1 ( HIOPSR_jsu_1M_div128_4_ ) , .B0 ( HIOPSR_jsu_1M_div128_5_ ) , .A ( n913 ) ) ; SIVX4 U564 (.Z ( n476 ) , .A ( n275 ) ) ; SNR2Z1X4 U565 (.B ( n479 ) , .Z ( n489 ) , .A ( n476 ) ) ; SAO2BB2X4 U566 (.A2 ( n490 ) , .A1 ( n272 ) , .ZN ( n882 ) , .B2 ( HIOPSR_jsu_1M_div128_5_ ) , .B1 ( n489 ) ) ; SIVX4 U567 (.Z ( n576 ) , .A ( zzeddr_rerun_time_cnt[6] ) ) ; SNN2X4 U568 (.A ( n906 ) , .Z ( n556 ) , .B ( n772 ) ) ; SNN2X4 U569 (.A ( n273 ) , .Z ( n577 ) , .B ( n915 ) ) ; SNN2X4 U570 (.A ( n906 ) , .Z ( n274 ) , .B ( ops_cal_zzeddr_start ) ) ; SAO2BB2X4 U571 (.A2 ( n577 ) , .A1 ( n576 ) , .ZN ( n869 ) , .B2 ( n274 ) , .B1 ( zzeddr_rerun_time_cnt[7] ) ) ; SNR4X4 U572 (.Z ( n495 ) , .A ( cshi_so33 ) , .B ( micho_1m_jsu_7_ ) , .C ( cshi_so18 ) , .D ( n275 ) ) ; SAOI2B1X4 U573 (.Z ( n278 ) , .A ( micho_1m_jsu_0_ ) , .B1 ( n276 ) , .B0 ( n277 ) ) ; SNR4X4 U574 (.Z ( n515 ) , .A ( n278 ) , .B ( n520 ) , .C ( n495 ) , .D ( n759 ) ) ; SNR2Z1X4 U575 (.B ( n515 ) , .Z ( n514 ) , .A ( n495 ) ) ; SIVX4 U576 (.Z ( n544 ) , .A ( cshi_so21 ) ) ; SIVX4 U577 (.Z ( n543 ) , .A ( cshi_so22 ) ) ; SIVX4 U578 (.Z ( n542 ) , .A ( HIOPSR_jsu_1M_div1024_3_ ) ) ; SNN4X4 U579 (.A ( HIOPSR_jsu_1M_div1024_2_ ) , .Z ( n503 ) , .B ( IN25 ) , .D ( HIOPSR_jsu_1M_div1024_0_ ) , .C ( HIOPSR_jsu_1M_div1024_1_ ) ) ; SNR2X4 U580 (.B ( n503 ) , .Z ( n504 ) , .A ( n542 ) ) ; SNN2X4 U581 (.A ( HIOPSR_jsu_1M_div1024_4_ ) , .Z ( n507 ) , .B ( n504 ) ) ; SNR2X4 U582 (.B ( n507 ) , .Z ( n508 ) , .A ( n543 ) ) ; SNN2X4 U583 (.A ( cshi_so36 ) , .Z ( n512 ) , .B ( n508 ) ) ; SNR2X4 U584 (.B ( n512 ) , .Z ( n279 ) , .A ( n544 ) ) ; SNN2X4 U585 (.A ( HIOPSR_jsu_1M_div1024_8_ ) , .Z ( n517 ) , .B ( n279 ) ) ; SOAI211X4 U586 (.A ( n515 ) , .Z ( n280 ) , .B ( n517 ) , .C1 ( n279 ) , .C0 ( HIOPSR_jsu_1M_div1024_8_ ) ) ; SAO21BX4 U587 (.B ( n280 ) , .ZN ( n872 ) , .A2 ( HIOPSR_jsu_1M_div1024_8_ ) , .A1 ( n514 ) ) ; SOAI211X4 U588 (.A ( n771 ) , .Z ( n289 ) , .B ( n288 ) , .C1 ( n925 ) , .C0 ( n534 ) ) ; SOAI22AX4 U589 (.A1 ( n290 ) , .A0 ( n438 ) , .Z ( n314 ) , .B0 ( n406 ) , .B1 ( n289 ) ) ; SNR2X4 U590 (.B ( n297 ) , .Z ( n292 ) , .A ( n291 ) ) ; SNN3X4 U591 (.A ( n628 ) , .Z ( n626 ) , .B ( n925 ) , .C ( n293 ) ) ; SOAI21X4 U592 (.B0 ( n907 ) , .B1 ( n626 ) , .Z ( n315 ) , .A ( n610 ) ) ; SOAI21X4 U593 (.B0 ( n306 ) , .B1 ( n296 ) , .Z ( n299 ) , .A ( n295 ) ) ; SAOI22X4 U594 (.A1 ( n303 ) , .Z ( n298 ) , .A0 ( n297 ) , .B0 ( n296 ) , .B1 ( n308 ) ) ; SAOI32X4 U595 (.A1 ( n298 ) , .B2 ( n299 ) , .Z ( n391 ) , .A0 ( int_HIOPSR ) , .B0 ( n411 ) , .B1 ( n918 ) ) ; SAOI22AX4 U596 (.A1 ( int_HIOPSR ) , .Z ( n383 ) , .A0 ( n919 ) , .B0 ( n302 ) , .B1 ( n301 ) ) ; SNR2BX4 U597 (.Z ( n305 ) , .B ( n309 ) , .A ( n307 ) ) ; SAOI21X4 U599 (.Z ( n312 ) , .A ( n306 ) , .B0 ( n310 ) , .B1 ( n307 ) ) ; SOAI22X4 U600 (.A1 ( n309 ) , .A0 ( n310 ) , .Z ( n311 ) , .B0 ( n919 ) , .B1 ( n308 ) ) ; SOAI211X4 U602 (.A ( n905 ) , .Z ( n318 ) , .B ( n765 ) , .C1 ( n633 ) , .C0 ( n534 ) ) ; SOAI22AX4 U603 (.A1 ( n319 ) , .A0 ( n909 ) , .Z ( n329 ) , .B0 ( n406 ) , .B1 ( n318 ) ) ; SNN3BX4 U604 (.B ( n633 ) , .A ( n320 ) , .Z ( n630 ) , .C ( n632 ) ) ; SOAI21X4 U605 (.B0 ( n907 ) , .B1 ( n630 ) , .Z ( n330 ) , .A ( n321 ) ) ; SOAI211X4 U606 (.A ( n895 ) , .Z ( n323 ) , .B ( n764 ) , .C1 ( n637 ) , .C0 ( n534 ) ) ; SOAI22AX4 U607 (.A1 ( n324 ) , .A0 ( n325 ) , .Z ( n332 ) , .B0 ( n406 ) , .B1 ( n323 ) ) ; SNN3X4 U608 (.A ( n636 ) , .Z ( n634 ) , .B ( n637 ) , .C ( n326 ) ) ; SOAI21X4 U609 (.B0 ( n907 ) , .B1 ( n634 ) , .Z ( n333 ) , .A ( n327 ) ) ; SOAI211X4 U610 (.A ( n902 ) , .Z ( n335 ) , .B ( n763 ) , .C1 ( n643 ) , .C0 ( n534 ) ) ; SOAI22AX4 U611 (.A1 ( n336 ) , .A0 ( n444 ) , .Z ( n341 ) , .B0 ( n406 ) , .B1 ( n335 ) ) ; SNN3X4 U612 (.A ( n337 ) , .Z ( n638 ) , .B ( n642 ) , .C ( n643 ) ) ; SOAI21X4 U613 (.B0 ( n907 ) , .B1 ( n638 ) , .Z ( n343 ) , .A ( n338 ) ) ; SIVX4 U614 (.Z ( n581 ) , .A ( int_hiopsr_d3 ) ) ; SOAI211X4 U615 (.A ( n591 ) , .Z ( n346 ) , .B ( max_min_d1 ) , .C1 ( n344 ) , .C0 ( n919 ) ) ; SIVX4 U616 (.Z ( n589 ) , .A ( timeout_jsu_0_ ) ) ; SNN3BX4 U617 (.B ( n624 ) , .A ( n434 ) , .Z ( n622 ) , .C ( n625 ) ) ; SNN4X4 U618 (.A ( n634 ) , .Z ( n349 ) , .B ( n630 ) , .D ( n622 ) , .C ( n626 ) ) ; SNN3X4 U619 (.A ( n347 ) , .Z ( n618 ) , .B ( n929 ) , .C ( n620 ) ) ; SNN3BX4 U620 (.B ( n928 ) , .A ( n348 ) , .Z ( n614 ) , .C ( n616 ) ) ; SNN4BX4 U621 (.C ( n618 ) , .Z ( n351 ) , .B ( n638 ) , .D ( n614 ) , .A ( n349 ) ) ; SAOI211X4 U622 (.A ( n613 ) , .Z ( n588 ) , .B ( n591 ) , .C0 ( n906 ) , .C1 ( n351 ) ) ; SIVX4 U623 (.Z ( n352 ) , .A ( lvsel_txdrv_q_2_ ) ) ; SAO2BB2X4 U624 (.A2 ( n352 ) , .A1 ( n368 ) , .ZN ( LVSEL_TXDRV[2] ) , .B2 ( ext_mmslv_txdrv[2] ) , .B1 ( n368 ) ) ; SAO2BB2X4 U627 (.A2 ( n704 ) , .A1 ( n768 ) , .ZN ( LVSEL_RXDIG[2] ) , .B2 ( lvsel_rxdig_q_2_ ) , .B1 ( n768 ) ) ; SAO2BB2X4 U628 (.A2 ( n353 ) , .A1 ( n372 ) , .ZN ( LVSEL_RXWHTH[2] ) , .B2 ( ext_mmslv_rxintp[2] ) , .B1 ( n372 ) ) ; SAO21BX4 U629 (.B ( n354 ) , .ZN ( n377 ) , .A2 ( n355 ) , .A1 ( n726 ) ) ; SOAI22X4 U630 (.A1 ( n632 ) , .A0 ( exten_guoche_rxdig ) , .Z ( n357 ) , .B0 ( exten_guoche_jsdsjul ) , .B1 ( n642 ) ) ; SAOI211X4 U631 (.A ( n358 ) , .Z ( n362 ) , .B ( n357 ) , .C0 ( n903 ) , .C1 ( n359 ) ) ; SNN2X4 U632 (.A ( n773 ) , .Z ( n361 ) , .B ( n360 ) ) ; SOAI211X4 U633 (.A ( n362 ) , .Z ( n460 ) , .B ( n361 ) , .C1 ( n636 ) , .C0 ( exten_guoche_rxintp ) ) ; SNN2X4 U634 (.A ( n903 ) , .Z ( n448 ) , .B ( n725 ) ) ; SIVX4 U635 (.Z ( n365 ) , .A ( n448 ) ) ; SIVX4 U637 (.Z ( n366 ) , .A ( cshi_so25 ) ) ; SAO2BB2X4 U638 (.A2 ( n366 ) , .A1 ( n368 ) , .ZN ( LVSEL_TXDRV[1] ) , .B2 ( ext_mmslv_txdrv[1] ) , .B1 ( n368 ) ) ; SAO22X4 U639 (.Z ( n32 ) , .A1 ( lvsel_jsdsjul_q[1] ) , .A0 ( n766 ) , .B0 ( n375 ) , .B1 ( ext_mmslv_jsdsjul[1] ) ) ; SAO22X4 U640 (.Z ( LVSEL_RXWHTH[1] ) , .A1 ( lvsel_rxintp_q_1_ ) , .A0 ( n767 ) , .B0 ( n372 ) , .B1 ( ext_mmslv_rxintp[1] ) ) ; SAO22X4 U641 (.Z ( n990 ) , .A1 ( lvsel_rxdig_q_1_ ) , .A0 ( n768 ) , .B0 ( n370 ) , .B1 ( ext_mmslv_rxdig[1] ) ) ; SIVX4 U642 (.Z ( n367 ) , .A ( lvsel_txdrv_q_0_ ) ) ; SAO2BB2X4 U643 (.A2 ( n367 ) , .A1 ( n368 ) , .ZN ( LVSEL_TXDRV[0] ) , .B2 ( ext_mmslv_txdrv[0] ) , .B1 ( n368 ) ) ; SAO22X4 U644 (.Z ( LVSEL_JSDSJUL[0] ) , .A1 ( lvsel_jsdsjul_q[0] ) , .A0 ( n766 ) , .B0 ( n375 ) , .B1 ( ext_mmslv_jsdsjul[0] ) ) ; SAO22X4 U645 (.Z ( LVSEL_RXDIG[0] ) , .A1 ( lvsel_rxdig_q_0_ ) , .A0 ( n768 ) , .B0 ( n370 ) , .B1 ( ext_mmslv_rxdig[0] ) ) ; SAO22X4 U646 (.Z ( n991 ) , .A1 ( cshi_so14 ) , .A0 ( n767 ) , .B0 ( n372 ) , .B1 ( ext_mmslv_rxintp[0] ) ) ; SAO2BB2X4 U647 (.A2 ( n374 ) , .A1 ( n375 ) , .ZN ( LVSEL_JSDSJUL[2] ) , .B2 ( ext_mmslv_jsdsjul[2] ) , .B1 ( n375 ) ) ; SNN2Z1X4 U648 (.A ( n905 ) , .Z ( n456 ) , .B ( exten_guoche_rxdig ) ) ; SAN2X4 U649 (.Z ( n455 ) , .B ( n902 ) , .A ( exten_guoche_jsdsjul ) ) ; SNN3BX4 U464 (.B ( n283 ) , .A ( n643 ) , .Z ( n213 ) , .C ( n612 ) ) ; SOAI32X4 U465 (.A1 ( n673 ) , .Z ( n187 ) , .A0 ( n173 ) , .B0 ( n673 ) , .B1 ( n337 ) , .B2 ( n174 ) ) ; SAOI21X4 U467 (.Z ( n185 ) , .A ( n199 ) , .B0 ( n204 ) , .B1 ( n179 ) ) ; SAOI32X4 U468 (.A1 ( n769 ) , .B2 ( n354 ) , .Z ( n184 ) , .A0 ( n180 ) , .B0 ( n774 ) , .B1 ( n769 ) ) ; SAOI32X4 U469 (.A1 ( n184 ) , .B2 ( n910 ) , .Z ( n186 ) , .A0 ( n205 ) , .B0 ( n185 ) , .B1 ( n184 ) ) ; SOAI31X4 U472 (.Z ( n196 ) , .A ( n896 ) , .B0 ( n192 ) , .B1 ( n222 ) , .B2 ( n191 ) ) ; SOAI22X4 U473 (.A1 ( n222 ) , .A0 ( n981 ) , .Z ( n195 ) , .B0 ( n194 ) , .B1 ( n193 ) ) ; SAOI21X4 U474 (.Z ( n208 ) , .A ( n202 ) , .B0 ( n204 ) , .B1 ( n203 ) ) ; SOAI22X4 U475 (.A1 ( n770 ) , .A0 ( n208 ) , .Z ( n209 ) , .B0 ( n207 ) , .B1 ( n206 ) ) ; SAOI31AX4 U476 (.A ( n209 ) , .Z ( n605 ) , .B0 ( n211 ) , .B1 ( n210 ) , .B2 ( n354 ) ) ; SNN3X4 U477 (.A ( n646 ) , .Z ( n212 ) , .B ( n607 ) , .C ( n605 ) ) ; SNR2X4 U478 (.B ( n348 ) , .Z ( n424 ) , .A ( n616 ) ) ; SOAI3B1X4 U479 (.Z ( n284 ) , .A ( n220 ) , .B1 ( n981 ) , .B2 ( n427 ) , .B0 ( n222 ) ) ; SNN2X4 U480 (.A ( micho_1m_jsu_6_ ) , .Z ( n602 ) , .B ( cshi_so19 ) ) ; SNR4X4 U481 (.Z ( n276 ) , .A ( n226 ) , .B ( n225 ) , .C ( n267 ) , .D ( n602 ) ) ; SNN3X4 U482 (.A ( cshi_so33 ) , .Z ( n277 ) , .B ( micho_1m_jsu_7_ ) , .C ( cshi_so18 ) ) ; SOAI31X4 U483 (.Z ( n228 ) , .A ( n522 ) , .B0 ( n227 ) , .B1 ( n524 ) , .B2 ( n265 ) ) ; SAOI22X4 U484 (.A1 ( cshi_so10 ) , .Z ( n233 ) , .A0 ( n905 ) , .B0 ( n773 ) , .B1 ( lvsel_txclk_q[4] ) ) ; SAOI22X4 U485 (.A1 ( lvsel_txintp_q[4] ) , .Z ( n232 ) , .A0 ( n904 ) , .B0 ( n903 ) , .B1 ( lvsel_txsujuju_q[4] ) ) ; SOAI211X4 U486 (.A ( n233 ) , .Z ( n235 ) , .B ( n232 ) , .C1 ( n234 ) , .C0 ( n636 ) ) ; SAOI211X4 U487 (.A ( n236 ) , .Z ( n291 ) , .B ( n235 ) , .C0 ( lvsel_txdrv_q_4_ ) , .C1 ( n771 ) ) ; SIVX4 U488 (.Z ( n374 ) , .A ( lvsel_jsdsjul_q[2] ) ) ; SIVX4 U489 (.Z ( n353 ) , .A ( cshi_so15 ) ) ; SAOI22X4 U490 (.A1 ( lvsel_rxdig_q_2_ ) , .Z ( n238 ) , .A0 ( n905 ) , .B0 ( n773 ) , .B1 ( lvsel_txclk_q[2] ) ) ; SAOI22X4 U491 (.A1 ( lvsel_txintp_q[2] ) , .Z ( n237 ) , .A0 ( n904 ) , .B0 ( n903 ) , .B1 ( lvsel_txsujuju_q[2] ) ) ; SOAI211X4 U492 (.A ( n238 ) , .Z ( n239 ) , .B ( n237 ) , .C1 ( n353 ) , .C0 ( n636 ) ) ; SAOI211X4 U493 (.A ( n240 ) , .Z ( n310 ) , .B ( n239 ) , .C0 ( lvsel_txdrv_q_2_ ) , .C1 ( n771 ) ) ; SAOI22X4 U494 (.A1 ( cshi_so25 ) , .Z ( n244 ) , .A0 ( n771 ) , .B0 ( n902 ) , .B1 ( lvsel_jsdsjul_q[1] ) ) ; SAOI22X4 U495 (.A1 ( lvsel_rxintp_q_1_ ) , .Z ( n243 ) , .A0 ( n895 ) , .B0 ( n905 ) , .B1 ( lvsel_rxdig_q_1_ ) ) ; SAOI22X4 U496 (.A1 ( lvsel_txintp_q[1] ) , .Z ( n242 ) , .A0 ( n904 ) , .B0 ( n903 ) , .B1 ( lvsel_txsujuju_q[1] ) ) ; SNN2X4 U497 (.A ( n773 ) , .Z ( n241 ) , .B ( lvsel_txclk_q[1] ) ) ; SNN4X4 U498 (.A ( n244 ) , .Z ( n253 ) , .B ( n243 ) , .D ( n241 ) , .C ( n242 ) ) ; SAOI22X4 U499 (.A1 ( lvsel_txdrv_q_0_ ) , .Z ( n248 ) , .A0 ( n771 ) , .B0 ( n902 ) , .B1 ( lvsel_jsdsjul_q[0] ) ) ; SAOI22X4 U500 (.A1 ( cshi_so14 ) , .Z ( n247 ) , .A0 ( n895 ) , .B0 ( n905 ) , .B1 ( lvsel_rxdig_q_0_ ) ) ; SAOI22X4 U501 (.A1 ( lvsel_txintp_q[0] ) , .Z ( n246 ) , .A0 ( n904 ) , .B0 ( n903 ) , .B1 ( lvsel_txsujuju_q[0] ) ) ; SNN4X4 U502 (.A ( n248 ) , .Z ( n302 ) , .B ( n247 ) , .D ( n245 ) , .C ( n246 ) ) ; SAOI22X4 U503 (.A1 ( lvsel_txdrv_q_3_ ) , .Z ( n252 ) , .A0 ( n771 ) , .B0 ( n902 ) , .B1 ( lvsel_jsdsjul_q[3] ) ) ; SAOI22X4 U504 (.A1 ( lvsel_rxintp_q_3_ ) , .Z ( n251 ) , .A0 ( n895 ) , .B0 ( n905 ) , .B1 ( lvsel_rxdig_q_3_ ) ) ; SAOI22X4 U505 (.A1 ( lvsel_txintp_q[3] ) , .Z ( n250 ) , .A0 ( n904 ) , .B0 ( n903 ) , .B1 ( lvsel_txsujuju_q[3] ) ) ; SNN2X4 U506 (.A ( n773 ) , .Z ( n249 ) , .B ( lvsel_txclk_q[3] ) ) ; SNN4X4 U507 (.A ( n252 ) , .Z ( n296 ) , .B ( n251 ) , .D ( n249 ) , .C ( n250 ) ) ; SNN2X4 U508 (.A ( n306 ) , .Z ( n295 ) , .B ( n296 ) ) ; SNR2Z1X4 U509 (.B ( n295 ) , .Z ( n344 ) , .A ( n291 ) ) ; SNR2X4 U510 (.B ( n308 ) , .Z ( n297 ) , .A ( n296 ) ) ; SAOI22X4 U511 (.A1 ( int_HIOPSR ) , .Z ( n255 ) , .A0 ( n254 ) , .B0 ( max_min_d1 ) , .B1 ( n907 ) ) ; SOAI21X4 U512 (.B0 ( int_HIOPSR ) , .B1 ( n256 ) , .Z ( n857 ) , .A ( n255 ) ) ; SOAI221X4 U521 (.A ( n257 ) , .B1 ( dly_curr_rxintp_st ) , .B0 ( n760 ) , .C0 ( n534 ) , .C1 ( n895 ) , .Z ( n258 ) ) ; SNN2AX4 U522 (.A ( n325 ) , .Z ( HEEN_OPS_RXWHTH ) , .B ( n258 ) ) ; SNN2X4 U523 (.A ( n758 ) , .Z ( n523 ) , .B ( n436 ) ) ; SAO21BX4 U524 (.B ( n523 ) , .ZN ( n806 ) , .A2 ( n759 ) , .A1 ( micho_1m_jsu_0_ ) ) ; SIVX4 U525 (.Z ( n259 ) , .A ( micho_1m_jsu_1_ ) ) ; SNR2X4 U526 (.B ( n265 ) , .Z ( n260 ) , .A ( n259 ) ) ; SAOI21X4 U527 (.Z ( n807 ) , .A ( n260 ) , .B0 ( n259 ) , .B1 ( n265 ) ) ; SAO2BB2X4 U528 (.A2 ( n267 ) , .A1 ( n260 ) , .ZN ( n808 ) , .B2 ( n267 ) , .B1 ( n260 ) ) ; SOA2BB2X4 U529 (.A2 ( n628 ) , .ZN ( n793 ) , .A1 ( n758 ) , .B2 ( n758 ) , .B1 ( dly_curr_txdrv_st ) ) ; SNN2X4 U530 (.A ( cshi_so19 ) , .Z ( n262 ) , .B ( n892 ) ) ; SOA21X4 U531 (.Z ( n811 ) , .A ( n262 ) , .B0 ( cshi_so19 ) , .B1 ( n892 ) ) ; SOA2BB2X4 U532 (.A2 ( n636 ) , .ZN ( n787 ) , .A1 ( n758 ) , .B2 ( n758 ) , .B1 ( dly_curr_rxintp_st ) ) ; SOA2BB2X4 U533 (.A2 ( n616 ) , .ZN ( n800 ) , .A1 ( n758 ) , .B2 ( n758 ) , .B1 ( dly_curr_txclk_st ) ) ; SOA2BB2X4 U534 (.A2 ( n624 ) , .ZN ( n791 ) , .A1 ( n758 ) , .B2 ( n758 ) , .B1 ( cshi_so34 ) ) ; SAO2BB2X4 U535 (.A2 ( n262 ) , .A1 ( micho_1m_jsu_6_ ) , .ZN ( n812 ) , .B2 ( n262 ) , .B1 ( micho_1m_jsu_6_ ) ) ; SOA2BB2X4 U536 (.A2 ( n642 ) , .ZN ( n802 ) , .A1 ( n758 ) , .B2 ( n758 ) , .B1 ( dly_curr_jsdsjul_st ) ) ; SIVX4 U537 (.Z ( n600 ) , .A ( micho_1m_jsu_7_ ) ) ; SNR3X4 U538 (.Z ( n603 ) , .A ( n602 ) , .B ( n600 ) , .C ( n601 ) ) ; SNN2X4 U539 (.A ( cshi_so33 ) , .Z ( n263 ) , .B ( n603 ) ) ; SOA21X4 U540 (.Z ( n814 ) , .A ( n263 ) , .B0 ( cshi_so33 ) , .B1 ( n603 ) ) ; SAO2BB2X4 U541 (.A2 ( n263 ) , .A1 ( cshi_so18 ) , .ZN ( n815 ) , .B2 ( n263 ) , .B1 ( cshi_so18 ) ) ; SAO2BB2X4 U542 (.A2 ( n439 ) , .A1 ( n182 ) , .ZN ( n803 ) , .B2 ( IN26 ) , .B1 ( n182 ) ) ; SOA2BB2X4 U543 (.A2 ( n632 ) , .ZN ( n788 ) , .A1 ( n758 ) , .B2 ( n758 ) , .B1 ( dly_curr_rxdig_st ) ) ; SAO2BB2X4 U544 (.A2 ( n439 ) , .A1 ( n906 ) , .ZN ( n804 ) , .B2 ( ops_cal_start_sync1 ) , .B1 ( n906 ) ) ; SNR3X4 U545 (.Z ( n465 ) , .A ( micho_1m_jsu_2_ ) , .B ( micho_1m_jsu_1_ ) , .C ( n265 ) ) ; SAOI211X4 U546 (.A ( n465 ) , .Z ( n268 ) , .B ( n759 ) , .C0 ( n267 ) , .C1 ( n436 ) ) ; SAN2X4 U547 (.Z ( n471 ) , .B ( n521 ) , .A ( n268 ) ) ; SNN2X4 U548 (.A ( IN25 ) , .Z ( n269 ) , .B ( n471 ) ) ; SNN2BX4 U549 (.B ( HIOPSR_jsu_1M_div8[0] ) , .Z ( n474 ) , .A ( n269 ) ) ; SNN2BX4 U550 (.B ( n269 ) , .Z ( n468 ) , .A ( n465 ) ) ; SIVX4 U551 (.Z ( n467 ) , .A ( HIOPSR_jsu_1M_div8[0] ) ) ; SNN2X4 U552 (.A ( n471 ) , .Z ( n466 ) , .B ( n467 ) ) ; SNN2X4 U553 (.A ( n468 ) , .Z ( n470 ) , .B ( n466 ) ) ; SAO2BB2X4 U554 (.A2 ( n474 ) , .A1 ( HIOPSR_jsu_1M_div8[1] ) , .ZN ( n889 ) , .B2 ( n470 ) , .B1 ( HIOPSR_jsu_1M_div8[1] ) ) ; SNN3X4 U555 (.A ( IN25 ) , .Z ( n482 ) , .B ( cshi_so35 ) , .C ( HIOPSR_jsu_1M_div128_1_ ) ) ; SIVX4 U556 (.Z ( n529 ) , .A ( HIOPSR_jsu_1M_div128_2_ ) ) ; SAO2BB2X4 U371 (.A2 ( n60 ) , .A1 ( n368 ) , .ZN ( LVSEL_TXDRV[3] ) , .B2 ( ext_mmslv_txdrv[3] ) , .B1 ( n368 ) ) ; SAOI22X4 U372 (.A1 ( LVSEL_JSDSJUL[3] ) , .Z ( n61 ) , .A0 ( n662 ) , .B0 ( n661 ) , .B1 ( LVSEL_TXDRV[3] ) ) ; SNN2X4 U373 (.A ( jcq_ops_cal_read[2] ) , .Z ( n663 ) , .B ( n687 ) ) ; SAOI21Z0X4 U374 (.Z ( n65 ) , .A ( n663 ) , .B0 ( n62 ) , .B1 ( n61 ) ) ; SNR3AX4 U376 (.Z ( n668 ) , .A ( jcq_ops_cal_read[2] ) , .B ( n687 ) , .C ( n761 ) ) ; SAOI21B1X4 U377 (.B ( n663 ) , .C0 ( n687 ) , .C1 ( n761 ) , .A ( n668 ) , .Z ( n666 ) ) ; SOAI32X4 U378 (.A1 ( n65 ) , .Z ( n66 ) , .A0 ( n666 ) , .B0 ( n65 ) , .B1 ( exten_mmslv_txdrv_sync2 ) , .B2 ( txdrv_st_done ) ) ; SOAI21AX4 U379 (.B0 ( n67 ) , .B1 ( n671 ) , .Z ( jcq_rd_ops_results[3] ) , .A ( n66 ) ) ; SAOI22X4 U380 (.A1 ( LVSEL_RXWHTH[4] ) , .Z ( n70 ) , .A0 ( n660 ) , .B0 ( n659 ) , .B1 ( LVSEL_RXDIG[4] ) ) ; SIVX4 U381 (.Z ( n231 ) , .A ( lvsel_jsdsjul_q[4] ) ) ; SOA22BBX4 U382 (.A2 ( n766 ) , .ZN ( LVSEL_JSDSJUL[4] ) , .A1 ( ext_mmslv_jsdsjul[4] ) , .B2 ( n231 ) , .B1 ( n766 ) ) ; SAO2BB2X4 U384 (.A2 ( n408 ) , .A1 ( n368 ) , .ZN ( LVSEL_TXDRV[4] ) , .B2 ( ext_mmslv_txdrv[4] ) , .B1 ( n368 ) ) ; SAOI22X4 U385 (.A1 ( LVSEL_JSDSJUL[4] ) , .Z ( n69 ) , .A0 ( n662 ) , .B0 ( n661 ) , .B1 ( LVSEL_TXDRV[4] ) ) ; SAOI21X4 U386 (.Z ( n71 ) , .A ( n663 ) , .B0 ( n70 ) , .B1 ( n69 ) ) ; SOAI32X4 U387 (.A1 ( n71 ) , .Z ( n72 ) , .A0 ( n666 ) , .B0 ( n71 ) , .B1 ( exten_mmslv_rxdig_sync2 ) , .B2 ( rxdig_st_done ) ) ; SOAI21AX4 U388 (.B0 ( n73 ) , .B1 ( n671 ) , .Z ( jcq_rd_ops_results[4] ) , .A ( n72 ) ) ; SNN4X4 U389 (.A ( n758 ) , .Z ( n601 ) , .B ( cshi_so32 ) , .D ( n229 ) , .C ( micho_1m_jsu_3_ ) ) ; SAOI21X4 U391 (.Z ( n810 ) , .A ( n892 ) , .B0 ( n226 ) , .B1 ( n74 ) ) ; SNN3X4 U392 (.A ( jcq_cal_ops_calen_jsdsjul_sync2[0] ) , .Z ( n104 ) , .B ( n338 ) , .C ( n674 ) ) ; SNR4X4 U393 (.A ( curr_state[3] ) , .B ( curr_state[0] ) , .Z ( n77 ) , .C ( curr_state[4] ) , .D ( curr_state[1] ) ) ; SNN3AX4 U394 (.A ( curr_state[8] ) , .Z ( n642 ) , .B ( n75 ) , .C ( n84 ) ) ; SNN3X4 U395 (.A ( cshi_so26 ) , .Z ( n447 ) , .B ( n338 ) , .C ( n88 ) ) ; SAOI21X4 U396 (.Z ( n175 ) , .A ( n337 ) , .B0 ( n775 ) , .B1 ( n763 ) ) ; SOAI21B1X4 U397 (.B ( n359 ) , .A ( jcq_cal_ops_zzeddr_rerun_en_sync2 ) , .Z ( n97 ) , .C1 ( jcq_cal_ops_calen_txclk_sync2[1] ) , .C0 ( jcq_cal_ops_calen_txsujuju_sync2_1_ ) ) ; SNN3BX4 U398 (.B ( n76 ) , .A ( curr_state[5] ) , .Z ( n78 ) , .C ( n606 ) ) ; SNR4X4 U399 (.A ( curr_state[3] ) , .B ( curr_state[4] ) , .Z ( n180 ) , .C ( n645 ) , .D ( n78 ) ) ; SNN3AX4 U400 (.A ( curr_state[5] ) , .Z ( n628 ) , .B ( n77 ) , .C ( n76 ) ) ; SNN2X4 U402 (.A ( n616 ) , .Z ( n355 ) , .B ( n620 ) ) ; SNR3X4 U403 (.Z ( n82 ) , .A ( curr_state[8] ) , .B ( curr_state[6] ) , .C ( n221 ) ) ; SNN3BAX4 U404 (.C ( n82 ) , .B ( curr_state[7] ) , .A ( n83 ) , .Z ( n636 ) ) ; SNR2BX4 U405 (.Z ( n86 ) , .B ( curr_state[8] ) , .A ( n84 ) ) ; SNN3BX4 U406 (.B ( n221 ) , .A ( curr_state[6] ) , .Z ( n99 ) , .C ( n86 ) ) ; SNN3X4 U407 (.A ( cshi_so8 ) , .Z ( n101 ) , .B ( n327 ) , .C ( n88 ) ) ; SAOI21X4 U408 (.Z ( n138 ) , .A ( n326 ) , .B0 ( n764 ) , .B1 ( n775 ) ) ; SNN3X4 U409 (.A ( jcq_cal_ops_calen_rxdig_sync2[1] ) , .Z ( n98 ) , .B ( n321 ) , .C ( n88 ) ) ; SNN3X4 U410 (.A ( jcq_cal_ops_calen_rxdig_sync2[0] ) , .Z ( n320 ) , .B ( n674 ) , .C ( n321 ) ) ; SOAI21X4 U411 (.B0 ( n98 ) , .B1 ( n192 ) , .Z ( n128 ) , .A ( n320 ) ) ; SNN3X4 U412 (.A ( n644 ) , .Z ( n172 ) , .B ( n89 ) , .C ( jcq_cal_ops_calen_txsujuju_sync2_1_ ) ) ; SNN3X4 U413 (.A ( cshi_so13 ) , .Z ( n224 ) , .B ( n674 ) , .C ( n644 ) ) ; SAOI21X4 U414 (.Z ( n163 ) , .A ( n347 ) , .B0 ( n430 ) , .B1 ( n775 ) ) ; SNN3AX4 U415 (.A ( n641 ) , .Z ( n427 ) , .B ( n89 ) , .C ( jcq_cal_ops_calen_txclk_sync2[1] ) ) ; SNN3X4 U416 (.A ( jcq_cal_ops_calen_txclk_sync2[0] ) , .Z ( n348 ) , .B ( n674 ) , .C ( n641 ) ) ; SOAI3111X4 U417 (.D1 ( cshi_so3 ) , .D2 ( cshi_so23 ) , .Z ( n384 ) , .A ( jcq_cal_ops_calen_txintp_sync2_1_ ) , .C ( n89 ) , .B ( n647 ) , .D0 ( jcq_force_no_skip_hsdlfuous_sync2 ) ) ; SNN3AX4 U418 (.A ( cshi_so29 ) , .Z ( n434 ) , .B ( n674 ) , .C ( n647 ) ) ; SOAI21X4 U419 (.B0 ( n384 ) , .B1 ( n192 ) , .Z ( n146 ) , .A ( n434 ) ) ; SNN3X4 U420 (.A ( jcq_cal_ops_calen_txdrv_sync2[1] ) , .Z ( n93 ) , .B ( n610 ) , .C ( n89 ) ) ; SAOI21X4 U421 (.Z ( n114 ) , .A ( n293 ) , .B0 ( n288 ) , .B1 ( n775 ) ) ; SCNN2X4 U422 (.A ( cshi_so12 ) , .B ( cshi_so28 ) , .Z ( n534 ) ) ; SNN3X4 U423 (.A ( int_hiopsr_d4 ) , .Z ( n91 ) , .B ( int_hiopsr_d2 ) , .C ( n582 ) ) ; SOAI22X4 U425 (.A1 ( n91 ) , .A0 ( int_hiopsr_d3 ) , .Z ( n92 ) , .B0 ( n586 ) , .B1 ( n90 ) ) ; SAOI211X4 U426 (.A ( exten_mmslv_jsdsjul_sync2 ) , .Z ( n107 ) , .B ( n96 ) , .C0 ( n673 ) , .C1 ( dly_curr_jsdsjul_st ) ) ; SNR2X4 U427 (.B ( n616 ) , .Z ( n219 ) , .A ( n95 ) ) ; SAOI211X4 U428 (.A ( cshi_so17 ) , .Z ( n218 ) , .B ( n96 ) , .C0 ( n673 ) , .C1 ( dly_curr_txclk_st ) ) ; SNR2BX4 U429 (.Z ( n160 ) , .B ( n218 ) , .A ( n219 ) ) ; SAOI211X4 U430 (.A ( n96 ) , .Z ( n169 ) , .B ( cshi_so20 ) , .C0 ( n673 ) , .C1 ( dly_curr_txsujuju_st ) ) ; SAOI22BX4 U431 (.B1 ( n160 ) , .B0 ( n161 ) , .A1 ( n168 ) , .A0 ( n169 ) , .Z ( n153 ) ) ; SAOI211X4 U432 (.A ( exten_mmslv_txintp_sync2 ) , .Z ( n144 ) , .B ( n96 ) , .C0 ( n673 ) , .C1 ( cshi_so34 ) ) ; SOAI22X4 U433 (.A1 ( n152 ) , .A0 ( n153 ) , .Z ( n109 ) , .B0 ( n144 ) , .B1 ( n143 ) ) ; SAOI211X4 U434 (.A ( n96 ) , .Z ( n112 ) , .B ( exten_mmslv_txdrv_sync2 ) , .C0 ( n673 ) , .C1 ( dly_curr_txdrv_st ) ) ; SAOI22BX4 U435 (.B1 ( n109 ) , .B0 ( n110 ) , .A1 ( n111 ) , .A0 ( n112 ) , .Z ( n125 ) ) ; SAOI211X4 U436 (.A ( exten_mmslv_rxdig_sync2 ) , .Z ( n118 ) , .B ( n96 ) , .C0 ( n673 ) , .C1 ( dly_curr_rxdig_st ) ) ; SNR2X4 U438 (.B ( n95 ) , .Z ( n129 ) , .A ( n636 ) ) ; SAOI211X4 U439 (.A ( exten_mmslv_rxintp_sync2 ) , .Z ( n130 ) , .B ( n96 ) , .C0 ( n673 ) , .C1 ( dly_curr_rxintp_st ) ) ; SNR2BX4 U440 (.Z ( n100 ) , .B ( n130 ) , .A ( n129 ) ) ; SNN3X4 U441 (.A ( zzeddr_rerun_time_cnt[1] ) , .Z ( n565 ) , .B ( zzeddr_rerun_time_cnt[0] ) , .C ( zzeddr_rerun_time_cnt[2] ) ) ; SNN3X4 U442 (.A ( n567 ) , .Z ( n574 ) , .B ( zzeddr_rerun_time_cnt[4] ) , .C ( zzeddr_rerun_time_cnt[3] ) ) ; SOAI22X4 U443 (.A1 ( n104 ) , .A0 ( n174 ) , .Z ( n105 ) , .B0 ( n103 ) , .B1 ( n447 ) ) ; SOAI31AX4 U444 (.B1 ( n216 ) , .B2 ( n176 ) , .Z ( n643 ) , .A ( n108 ) , .B0 ( n175 ) ) ; SAOI22BX4 U445 (.B1 ( n111 ) , .B0 ( n112 ) , .A1 ( n109 ) , .A0 ( n110 ) , .Z ( n113 ) ) ; SOAI3B1X4 U446 (.Z ( n116 ) , .A ( n113 ) , .B1 ( n114 ) , .B2 ( n216 ) , .B0 ( n115 ) ) ; SAOI3B1X4 U447 (.B0 ( n117 ) , .A ( n116 ) , .Z ( n283 ) , .B1 ( n288 ) , .B2 ( n159 ) ) ; SAOI32X4 U448 (.A1 ( n122 ) , .B2 ( n207 ) , .Z ( n123 ) , .A0 ( n121 ) , .B0 ( n142 ) , .B1 ( n122 ) ) ; SAOI2B1X4 U449 (.Z ( n126 ) , .A ( n123 ) , .B1 ( n124 ) , .B0 ( n125 ) ) ; SAOI32X4 U450 (.A1 ( n133 ) , .B2 ( n207 ) , .Z ( n134 ) , .A0 ( n132 ) , .B0 ( n142 ) , .B1 ( n133 ) ) ; SAOI2B1X4 U451 (.Z ( n137 ) , .A ( n134 ) , .B1 ( n135 ) , .B0 ( n136 ) ) ; SAOI22BX4 U452 (.B1 ( n633 ) , .B0 ( n316 ) , .A1 ( n637 ) , .A0 ( n325 ) , .Z ( n157 ) ) ; SOAI2B2X4 U453 (.A0 ( n144 ) , .A1 ( n143 ) , .Z ( n150 ) , .B0 ( n142 ) , .B1 ( n151 ) ) ; SNR2BX4 U454 (.Z ( n147 ) , .B ( n145 ) , .A ( n146 ) ) ; SOAI32X4 U455 (.A1 ( n150 ) , .Z ( n155 ) , .A0 ( n147 ) , .B0 ( n150 ) , .B1 ( n149 ) , .B2 ( n148 ) ) ; SOA2B2X4 U456 (.Z ( n154 ) , .A0 ( n152 ) , .A1 ( n153 ) , .B0 ( n151 ) , .B1 ( n207 ) ) ; SOAI211X4 U457 (.A ( n157 ) , .Z ( n158 ) , .B ( n385 ) , .C1 ( n438 ) , .C0 ( n283 ) ) ; SAOI2B1X4 U458 (.Z ( n230 ) , .A ( n158 ) , .B1 ( n643 ) , .B0 ( n444 ) ) ; SNN3X4 U459 (.A ( cal_zzeddr_done ) , .Z ( n178 ) , .B ( ops_cal_zzeddr_start ) , .C ( n769 ) ) ; SNN2BX4 U460 (.B ( n160 ) , .Z ( n166 ) , .A ( n161 ) ) ; SNN2BX4 U461 (.B ( n217 ) , .Z ( n164 ) , .A ( n163 ) ) ; SAOI32X4 U462 (.A1 ( n166 ) , .B2 ( n165 ) , .Z ( n167 ) , .A0 ( n164 ) , .B0 ( n178 ) , .B1 ( n166 ) ) ; SOAI31X4 U463 (.Z ( n281 ) , .A ( n170 ) , .B0 ( n981 ) , .B1 ( n172 ) , .B2 ( n171 ) ) ; SOAI22AX4 U278 (.A1 ( n4 ) , .A0 ( zzeddr_in[1] ) , .Z ( LVSEL_TXCLK[2] ) , .B0 ( n429 ) , .B1 ( n3 ) ) ; SIVX4 U279 (.Z ( n417 ) , .A ( lvsel_txclk_q[3] ) ) ; SOAI22AX4 U280 (.A1 ( n4 ) , .A0 ( zzeddr_in[2] ) , .Z ( LVSEL_TXCLK[3] ) , .B0 ( n417 ) , .B1 ( n3 ) ) ; SOAI22AX4 U282 (.A1 ( n4 ) , .A0 ( zzeddr_in[3] ) , .Z ( LVSEL_TXCLK[4] ) , .B0 ( n540 ) , .B1 ( n3 ) ) ; SNN4X4 U283 (.A ( n21 ) , .Z ( n5 ) , .B ( LVSEL_TXCLK[2] ) , .D ( LVSEL_TXCLK[4] ) , .C ( LVSEL_TXCLK[3] ) ) ; SNR2Z1X4 U285 (.B ( n777 ) , .Z ( n41 ) , .A ( LVSEL_TXCLK[0] ) ) ; SNR4X4 U286 (.A ( n6 ) , .B ( LVSEL_TXCLK[3] ) , .Z ( n19 ) , .C ( LVSEL_TXCLK[2] ) , .D ( LVSEL_TXCLK[4] ) ) ; SAOI21X4 U287 (.Z ( n7 ) , .A ( n41 ) , .B0 ( LVSEL_TXCLK[0] ) , .B1 ( n777 ) ) ; SAOI211X4 U288 (.A ( n7 ) , .Z ( n8 ) , .B ( n24 ) , .C0 ( zzeddr_in[3] ) , .C1 ( n19 ) ) ; SAOI2B11X4 U289 (.C0 ( n47 ) , .A ( n50 ) , .Z ( n10 ) , .B ( n8 ) , .C1 ( LVSEL_TXCLK[0] ) ) ; SNR2X4 U290 (.B ( jcq_cal_ops_calen_txsujuju_sync2_1_ ) , .Z ( n9 ) , .A ( cshi_so13 ) ) ; SNN2X4 U291 (.A ( n9 ) , .Z ( n53 ) , .B ( n644 ) ) ; SNN2BX4 U293 (.B ( n644 ) , .Z ( n52 ) , .A ( n9 ) ) ; SOAI22X4 U294 (.A1 ( n53 ) , .A0 ( n10 ) , .Z ( LVSEL_TXSUJUJU[0] ) , .B0 ( n418 ) , .B1 ( n52 ) ) ; SOAI21Z1X4 U296 (.B0 ( cshi_so29 ) , .B1 ( jcq_cal_ops_calen_txintp_sync2_1_ ) , .Z ( n55 ) , .A ( n647 ) ) ; SNR2X4 U297 (.B ( n55 ) , .Z ( LVSEL_TXWHTH[0] ) , .A ( n415 ) ) ; SAN2X4 U300 (.Z ( n43 ) , .B ( zzeddr_in[1] ) , .A ( LVSEL_TXCLK[0] ) ) ; SAOI21X4 U301 (.Z ( n42 ) , .A ( n11 ) , .B0 ( zzeddr_in[2] ) , .B1 ( zzeddr_in[1] ) ) ; SNR3X4 U302 (.Z ( n36 ) , .A ( zzeddr_in[3] ) , .B ( n11 ) , .C ( n33 ) ) ; SNR2AX4 U303 (.B ( n36 ) , .Z ( n30 ) , .A ( n897 ) ) ; SNN2X4 U304 (.A ( n30 ) , .Z ( n12 ) , .B ( LVSEL_TXCLK[3] ) ) ; SOAI22X4 U305 (.A1 ( n360 ) , .A0 ( zzeddr_in[3] ) , .Z ( n15 ) , .B0 ( n900 ) , .B1 ( n12 ) ) ; SNN2X4 U307 (.A ( n897 ) , .Z ( n18 ) , .B ( n29 ) ) ; SIVX4 U308 (.Z ( n17 ) , .A ( n18 ) ) ; SAOI21X4 U309 (.Z ( n14 ) , .A ( n24 ) , .B0 ( n898 ) , .B1 ( n17 ) ) ; SNN2X4 U310 (.A ( n21 ) , .Z ( n13 ) , .B ( n12 ) ) ; SNN2X4 U311 (.A ( n47 ) , .Z ( n20 ) , .B ( n13 ) ) ; SOAI32X4 U312 (.A1 ( n15 ) , .Z ( n16 ) , .A0 ( LVSEL_TXCLK[4] ) , .B0 ( n15 ) , .B1 ( n14 ) , .B2 ( n20 ) ) ; SOAI22X4 U314 (.A1 ( n53 ) , .A0 ( n16 ) , .Z ( LVSEL_TXSUJUJU[4] ) , .B0 ( n554 ) , .B1 ( n52 ) ) ; SNR2X4 U316 (.B ( n55 ) , .Z ( LVSEL_TXWHTH[4] ) , .A ( n404 ) ) ; SIVX4 U317 (.Z ( n463 ) , .A ( zzeddr_in[2] ) ) ; SOAI22X4 U318 (.A1 ( n18 ) , .A0 ( n898 ) , .Z ( n25 ) , .B0 ( LVSEL_TXCLK[3] ) , .B1 ( n17 ) ) ; SNR2X4 U320 (.B ( n776 ) , .Z ( n28 ) , .A ( n19 ) ) ; SIVX4 U321 (.Z ( n45 ) , .A ( n28 ) ) ; SAOI32X4 U322 (.A1 ( n20 ) , .B2 ( n21 ) , .Z ( n23 ) , .A0 ( LVSEL_TXCLK[3] ) , .B0 ( n30 ) , .B1 ( n898 ) ) ; SOAI31X4 U323 (.Z ( n26 ) , .A ( n23 ) , .B0 ( n25 ) , .B1 ( n24 ) , .B2 ( n45 ) ) ; SAOI211X4 U324 (.A ( n50 ) , .Z ( n27 ) , .B ( n26 ) , .C0 ( n726 ) , .C1 ( n463 ) ) ; SIVX4 U325 (.Z ( n402 ) , .A ( lvsel_txsujuju_q[3] ) ) ; SOAI22X4 U326 (.A1 ( n53 ) , .A0 ( n27 ) , .Z ( LVSEL_TXSUJUJU[3] ) , .B0 ( n402 ) , .B1 ( n52 ) ) ; SIVX4 U327 (.Z ( n392 ) , .A ( lvsel_txintp_q[3] ) ) ; SNR2X4 U328 (.B ( n55 ) , .Z ( LVSEL_TXWHTH[3] ) , .A ( n392 ) ) ; SOAI32X4 U329 (.A1 ( n776 ) , .Z ( n35 ) , .A0 ( n28 ) , .B0 ( n776 ) , .B1 ( n29 ) , .B2 ( LVSEL_TXCLK[2] ) ) ; SIVX4 U331 (.Z ( n31 ) , .A ( n30 ) ) ; SAOI21X4 U332 (.Z ( n34 ) , .A ( n31 ) , .B0 ( n33 ) , .B1 ( zzeddr_in[3] ) ) ; SAOI211X4 U333 (.A ( n35 ) , .Z ( n39 ) , .B ( n34 ) , .C0 ( n897 ) , .C1 ( n36 ) ) ; SOAI22X4 U334 (.A1 ( n360 ) , .A0 ( zzeddr_in[1] ) , .Z ( n38 ) , .B0 ( n897 ) , .B1 ( n47 ) ) ; SAOI211X4 U335 (.A ( n50 ) , .Z ( n40 ) , .B ( n38 ) , .C0 ( n725 ) , .C1 ( n39 ) ) ; SOAI22X4 U337 (.A1 ( n53 ) , .A0 ( n40 ) , .Z ( LVSEL_TXSUJUJU[2] ) , .B0 ( n426 ) , .B1 ( n52 ) ) ; SIVX4 U338 (.Z ( n390 ) , .A ( lvsel_txintp_q[2] ) ) ; SNR2X4 U339 (.B ( n55 ) , .Z ( LVSEL_TXWHTH[2] ) , .A ( n390 ) ) ; SAO2BB2X4 U340 (.A2 ( n45 ) , .A1 ( n46 ) , .ZN ( n51 ) , .B2 ( n776 ) , .B1 ( n44 ) ) ; SOAI22X4 U341 (.A1 ( n360 ) , .A0 ( zzeddr_in[0] ) , .Z ( n49 ) , .B0 ( n899 ) , .B1 ( n47 ) ) ; SAOI211X4 U342 (.A ( n50 ) , .Z ( n54 ) , .B ( n49 ) , .C0 ( n725 ) , .C1 ( n51 ) ) ; SOAI22X4 U344 (.A1 ( n53 ) , .A0 ( n54 ) , .Z ( LVSEL_TXSUJUJU[1] ) , .B0 ( n425 ) , .B1 ( n52 ) ) ; SIVX4 U345 (.Z ( n389 ) , .A ( lvsel_txintp_q[1] ) ) ; SNR2X4 U346 (.B ( n55 ) , .Z ( LVSEL_TXWHTH[1] ) , .A ( n389 ) ) ; SNR4X4 U347 (.A ( curr_state[7] ) , .B ( curr_state[8] ) , .Z ( n79 ) , .C ( curr_state[6] ) , .D ( n221 ) ) ; SNR3X4 U348 (.A ( curr_state[5] ) , .C ( n57 ) , .B ( curr_state[3] ) , .Z ( ops_cal_zzeddr_start ) ) ; SNN2X4 U349 (.A ( micho_1m_jsu_2_ ) , .Z ( n521 ) , .B ( micho_1m_jsu_1_ ) ) ; SNR2Z1X4 U350 (.B ( n521 ) , .Z ( n229 ) , .A ( n436 ) ) ; SNN2X4 U351 (.A ( n758 ) , .Z ( n59 ) , .B ( n229 ) ) ; SNN3X4 U352 (.A ( n758 ) , .Z ( n74 ) , .B ( micho_1m_jsu_3_ ) , .C ( n229 ) ) ; SIVX4 U353 (.Z ( n58 ) , .A ( n74 ) ) ; SAOI21X4 U354 (.Z ( n809 ) , .A ( n58 ) , .B0 ( n225 ) , .B1 ( n59 ) ) ; SAN2BX4 U356 (.B ( jcq_ops_cal_read[1] ) , .Z ( n660 ) , .A ( jcq_ops_cal_read[0] ) ) ; SAN2X4 U357 (.Z ( n662 ) , .B ( jcq_ops_cal_read[0] ) , .A ( jcq_ops_cal_read[1] ) ) ; SAN2BX4 U358 (.B ( jcq_ops_cal_read[0] ) , .Z ( n659 ) , .A ( jcq_ops_cal_read[1] ) ) ; SOA22X4 U361 (.Z ( LVSEL_RXWHTH[3] ) , .A1 ( lvsel_rxintp_q_3_ ) , .A0 ( n372 ) , .B0 ( ext_mmslv_rxintp[3] ) , .B1 ( n767 ) ) ; SOA2BB2X4 U363 (.A2 ( n370 ) , .ZN ( LVSEL_RXDIG[3] ) , .A1 ( n702 ) , .B2 ( lvsel_rxdig_q_3_ ) , .B1 ( n370 ) ) ; SAOI22X4 U364 (.A1 ( LVSEL_RXWHTH[3] ) , .Z ( n62 ) , .A0 ( n660 ) , .B0 ( n659 ) , .B1 ( LVSEL_RXDIG[3] ) ) ; SOAI21X4 U365 (.B0 ( jcq_cal_ops_calen_jsdsjul_sync2[0] ) , .B1 ( cshi_so26 ) , .Z ( n375 ) , .A ( n338 ) ) ; SOA22X4 U367 (.Z ( LVSEL_JSDSJUL[3] ) , .A1 ( lvsel_jsdsjul_q[3] ) , .A0 ( n375 ) , .B0 ( ext_mmslv_jsdsjul[3] ) , .B1 ( n766 ) ) ; SNR2Z1X4 U368 (.B ( jcq_ops_cal_read[1] ) , .Z ( n661 ) , .A ( jcq_ops_cal_read[0] ) ) ; SOAI21X4 U369 (.A ( n610 ) , .B0 ( jcq_cal_ops_calen_txdrv_sync2[0] ) , .B1 ( jcq_cal_ops_calen_txdrv_sync2[1] ) , .Z ( n368 ) ) ; SIVX4 U370 (.Z ( n60 ) , .A ( lvsel_txdrv_q_3_ ) ) ; SNR2X4 U185 (.B ( n320 ) , .Z ( n316 ) , .A ( n632 ) ) ; SNN2X4 U186 (.A ( n895 ) , .Z ( n325 ) , .B ( n326 ) ) ; SNN2X4 U187 (.A ( n337 ) , .Z ( n444 ) , .B ( n902 ) ) ; SNR2X4 U188 (.B ( n231 ) , .Z ( n236 ) , .A ( n642 ) ) ; SNR2X4 U189 (.B ( n277 ) , .Z ( n520 ) , .A ( n524 ) ) ; SNN2X4 U190 (.A ( n276 ) , .Z ( n524 ) , .B ( micho_1m_jsu_1_ ) ) ; SNN2X4 U191 (.A ( n465 ) , .Z ( n275 ) , .B ( n270 ) ) ; SAO2B1X4 U193 (.Z ( n89 ) , .B0 ( MNI_IDLE_sync2 ) , .B1 ( to_mni_lq_tx_sync2 ) , .A ( jcq_force_no_skip_hsdlfuous_sync2 ) ) ; SNR2X4 U195 (.B ( n78 ) , .Z ( n81 ) , .A ( curr_state[0] ) ) ; SNR2X4 U196 (.B ( n93 ) , .Z ( n435 ) , .A ( n674 ) ) ; SAN3X4 U197 (.Z ( n293 ) , .C ( n610 ) , .B ( n674 ) , .A ( jcq_cal_ops_calen_txdrv_sync2[0] ) ) ; SNN2X4 U198 (.A ( n130 ) , .Z ( n133 ) , .B ( n129 ) ) ; SNN2X4 U199 (.A ( n765 ) , .Z ( n121 ) , .B ( n120 ) ) ; SNN2X4 U201 (.A ( n906 ) , .Z ( n336 ) , .B ( n643 ) ) ; SNN2X4 U202 (.A ( n906 ) , .Z ( n319 ) , .B ( n633 ) ) ; SAOI21X4 U203 (.Z ( n170 ) , .A ( n167 ) , .B0 ( n169 ) , .B1 ( n168 ) ) ; SNR2X4 U204 (.B ( n520 ) , .Z ( n227 ) , .A ( cshi_so28 ) ) ; SNN2X4 U205 (.A ( n906 ) , .Z ( n290 ) , .B ( n925 ) ) ; SNN2X4 U206 (.A ( n906 ) , .Z ( n324 ) , .B ( n637 ) ) ; SOA2BB2X4 U207 (.A2 ( n206 ) , .ZN ( n202 ) , .A1 ( n201 ) , .B2 ( n199 ) , .B1 ( n200 ) ) ; SNR2X4 U208 (.B ( n221 ) , .Z ( n75 ) , .A ( curr_state[6] ) ) ; SNN2X4 U210 (.A ( n758 ) , .Z ( n265 ) , .B ( micho_1m_jsu_0_ ) ) ; SIVX4 U212 (.Z ( n226 ) , .A ( cshi_so32 ) ) ; SOA32X4 U213 (.Z ( n1 ) , .A1 ( n304 ) , .A0 ( n411 ) , .B0 ( int_HIOPSR ) , .B1 ( n344 ) , .B2 ( n305 ) ) ; SAO21BX4 U214 (.B ( n307 ) , .ZN ( n304 ) , .A2 ( n303 ) , .A1 ( n309 ) ) ; SNN2X4 U215 (.A ( n344 ) , .Z ( n301 ) , .B ( n411 ) ) ; SAOI21Z1X4 U216 (.Z ( n595 ) , .A ( n588 ) , .B0 ( n591 ) , .B1 ( n589 ) ) ; SNN2X4 U217 (.A ( n591 ) , .Z ( n594 ) , .B ( n590 ) ) ; SAOI21Z0X4 U218 (.Z ( n599 ) , .A ( n588 ) , .B0 ( n591 ) , .B1 ( n597 ) ) ; SNN2X4 U219 (.A ( n591 ) , .Z ( n596 ) , .B ( n598 ) ) ; SNN2Z1X4 U220 (.A ( n291 ) , .Z ( n303 ) , .B ( n297 ) ) ; SNR2X4 U225 (.B ( curr_state[4] ) , .Z ( n56 ) , .A ( curr_state[0] ) ) ; SNR2X4 U227 (.B ( n620 ) , .Z ( n428 ) , .A ( n224 ) ) ; SNN2X4 U228 (.A ( n673 ) , .Z ( n433 ) , .B ( n141 ) ) ; SNN2X4 U229 (.A ( n771 ) , .Z ( n438 ) , .B ( n293 ) ) ; SAO222X4 U230 (.A1 ( n920 ) , .A0 ( n314 ) , .Z ( n831 ) , .C1 ( lvsel_txdrv_q_4_ ) , .C0 ( n313 ) , .B0 ( n315 ) , .B1 ( ext_mmslv_txdrv[4] ) ) ; SAO222X4 U231 (.A1 ( n920 ) , .A0 ( n329 ) , .Z ( n836 ) , .C1 ( cshi_so10 ) , .C0 ( n328 ) , .B0 ( n330 ) , .B1 ( ext_mmslv_rxdig[4] ) ) ; SAO222X4 U232 (.A1 ( n920 ) , .A0 ( n332 ) , .Z ( n841 ) , .C1 ( lvsel_rxintp_q_4_ ) , .C0 ( n331 ) , .B0 ( n333 ) , .B1 ( ext_mmslv_rxintp[4] ) ) ; SAO222X4 U233 (.A1 ( n920 ) , .A0 ( n341 ) , .Z ( n846 ) , .C1 ( lvsel_jsdsjul_q[4] ) , .C0 ( n340 ) , .B0 ( n343 ) , .B1 ( ext_mmslv_jsdsjul[4] ) ) ; SAO21BX4 U234 (.B ( n336 ) , .ZN ( n789 ) , .A2 ( n907 ) , .A1 ( curr_state[8] ) ) ; SAO21BX4 U235 (.B ( n319 ) , .ZN ( n790 ) , .A2 ( n907 ) , .A1 ( curr_state[6] ) ) ; SAO21BX4 U236 (.B ( n290 ) , .ZN ( n796 ) , .A2 ( n907 ) , .A1 ( curr_state[5] ) ) ; SAO21BX4 U237 (.B ( n324 ) , .ZN ( n797 ) , .A2 ( n907 ) , .A1 ( curr_state[7] ) ) ; SCMX2X4 U238 (.B ( ops_cal_start ) , .S ( n906 ) , .A ( ops_cal_start_sync1 ) , .Z ( n805 ) ) ; SAO222X4 U239 (.A1 ( ext_mmslv_txdrv[2] ) , .A0 ( n315 ) , .Z ( n833 ) , .C1 ( lvsel_txdrv_q_2_ ) , .C0 ( n313 ) , .B0 ( n924 ) , .B1 ( n314 ) ) ; SAO222X4 U240 (.A1 ( ext_mmslv_rxdig[2] ) , .A0 ( n330 ) , .Z ( n838 ) , .C1 ( lvsel_rxdig_q_2_ ) , .C0 ( n328 ) , .B0 ( n924 ) , .B1 ( n329 ) ) ; SAO222X4 U241 (.A1 ( ext_mmslv_rxintp[2] ) , .A0 ( n333 ) , .Z ( n843 ) , .C1 ( cshi_so15 ) , .C0 ( n331 ) , .B0 ( n924 ) , .B1 ( n332 ) ) ; SAO222X4 U242 (.A1 ( ext_mmslv_jsdsjul[2] ) , .A0 ( n343 ) , .Z ( n848 ) , .C1 ( lvsel_jsdsjul_q[2] ) , .C0 ( n340 ) , .B0 ( n924 ) , .B1 ( n341 ) ) ; SAO222X4 U243 (.A1 ( ext_mmslv_txdrv[1] ) , .A0 ( n315 ) , .Z ( n834 ) , .C1 ( cshi_so25 ) , .C0 ( n313 ) , .B0 ( n1 ) , .B1 ( n314 ) ) ; SAO222X4 U244 (.A1 ( ext_mmslv_rxdig[1] ) , .A0 ( n330 ) , .Z ( n839 ) , .C1 ( lvsel_rxdig_q_1_ ) , .C0 ( n328 ) , .B0 ( n1 ) , .B1 ( n329 ) ) ; SAO222X4 U245 (.A1 ( ext_mmslv_rxintp[1] ) , .A0 ( n333 ) , .Z ( n844 ) , .C1 ( lvsel_rxintp_q_1_ ) , .C0 ( n331 ) , .B0 ( n1 ) , .B1 ( n332 ) ) ; SAO222X4 U246 (.A1 ( ext_mmslv_jsdsjul[1] ) , .A0 ( n343 ) , .Z ( n849 ) , .C1 ( lvsel_jsdsjul_q[1] ) , .C0 ( n340 ) , .B0 ( n1 ) , .B1 ( n341 ) ) ; SAO222X4 U247 (.A1 ( ext_mmslv_txdrv[0] ) , .A0 ( n315 ) , .Z ( n835 ) , .C1 ( lvsel_txdrv_q_0_ ) , .C0 ( n313 ) , .B0 ( n383 ) , .B1 ( n314 ) ) ; SAO222X4 U248 (.A1 ( ext_mmslv_rxdig[0] ) , .A0 ( n330 ) , .Z ( n840 ) , .C1 ( lvsel_rxdig_q_0_ ) , .C0 ( n328 ) , .B0 ( n383 ) , .B1 ( n329 ) ) ; SAO222X4 U249 (.A1 ( ext_mmslv_rxintp[0] ) , .A0 ( n333 ) , .Z ( n845 ) , .C1 ( cshi_so14 ) , .C0 ( n331 ) , .B0 ( n383 ) , .B1 ( n332 ) ) ; SAO222X4 U250 (.A1 ( ext_mmslv_jsdsjul[0] ) , .A0 ( n343 ) , .Z ( n850 ) , .C1 ( lvsel_jsdsjul_q[0] ) , .C0 ( n340 ) , .B0 ( n383 ) , .B1 ( n341 ) ) ; SOA2BB2X4 U251 (.A2 ( n589 ) , .ZN ( n854 ) , .A1 ( n926 ) , .B2 ( n588 ) , .B1 ( n589 ) ) ; SAO222X4 U252 (.A1 ( n391 ) , .A0 ( n314 ) , .Z ( n832 ) , .C1 ( lvsel_txdrv_q_3_ ) , .C0 ( n313 ) , .B0 ( n315 ) , .B1 ( ext_mmslv_txdrv[3] ) ) ; SAO222X4 U253 (.A1 ( n391 ) , .A0 ( n341 ) , .Z ( n847 ) , .C1 ( lvsel_jsdsjul_q[3] ) , .C0 ( n340 ) , .B0 ( n343 ) , .B1 ( ext_mmslv_jsdsjul[3] ) ) ; SAO222X4 U254 (.A1 ( n391 ) , .A0 ( n329 ) , .Z ( n837 ) , .C1 ( lvsel_rxdig_q_3_ ) , .C0 ( n328 ) , .B0 ( n330 ) , .B1 ( ext_mmslv_rxdig[3] ) ) ; SAO222X4 U255 (.A1 ( n391 ) , .A0 ( n332 ) , .Z ( n842 ) , .C1 ( lvsel_rxintp_q_3_ ) , .C0 ( n331 ) , .B0 ( n333 ) , .B1 ( ext_mmslv_rxintp[3] ) ) ; SAO21BX4 U256 (.B ( n346 ) , .ZN ( n856 ) , .A2 ( n907 ) , .A1 ( max_min_d2 ) ) ; SOAI21X4 U257 (.B0 ( cshi_so24 ) , .B1 ( cshi_so8 ) , .Z ( n372 ) , .A ( n327 ) ) ; SIVX4 U259 (.Z ( n234 ) , .A ( lvsel_rxintp_q_4_ ) ) ; SOA2BB2X4 U260 (.A2 ( n234 ) , .ZN ( LVSEL_RXWHTH[4] ) , .A1 ( n767 ) , .B2 ( n767 ) , .B1 ( ext_mmslv_rxintp[4] ) ) ; SIVX4 U261 (.Z ( n382 ) , .A ( ext_mmslv_rxdig[4] ) ) ; SOAI21X4 U262 (.B0 ( jcq_cal_ops_calen_rxdig_sync2[0] ) , .B1 ( jcq_cal_ops_calen_rxdig_sync2[1] ) , .Z ( n370 ) , .A ( n321 ) ) ; SOA2BB2X4 U263 (.A2 ( n370 ) , .ZN ( LVSEL_RXDIG[4] ) , .A1 ( n382 ) , .B2 ( cshi_so10 ) , .B1 ( n370 ) ) ; SOAI21B1X4 U264 (.B ( jcq_cal_ops_zzeddren_tx_sync2_0_ ) , .A ( cshi_so11 ) , .Z ( n24 ) , .C1 ( slew_ctrl_en_sync2 ) , .C0 ( jcq_cal_ops_zzeddren_tx_force_sync2 ) ) ; SCNR2X4 U265 (.B ( zzeddr_in[2] ) , .Z ( n11 ) , .A ( zzeddr_in[1] ) ) ; SOAI21B1X4 U266 (.B ( cshi_so11 ) , .A ( jcq_cal_ops_zzeddren_tx_sync2_0_ ) , .Z ( n360 ) , .C1 ( slew_ctrl_en_sync2 ) , .C0 ( jcq_cal_ops_zzeddren_tx_force_sync2 ) ) ; SAOI31AX4 U267 (.A ( n359 ) , .Z ( n47 ) , .B0 ( n725 ) , .B1 ( zzeddr_in[3] ) , .B2 ( n11 ) ) ; SNR2X4 U269 (.B ( jcq_cal_ops_calen_txclk_sync2[0] ) , .Z ( n2 ) , .A ( jcq_cal_ops_calen_txclk_sync2[1] ) ) ; SNN2BX4 U270 (.B ( n641 ) , .Z ( n3 ) , .A ( n2 ) ) ; SNR2Z1X4 U271 (.B ( n3 ) , .Z ( LVSEL_TXCLK[0] ) , .A ( n420 ) ) ; SIVX4 U272 (.Z ( n413 ) , .A ( lvsel_txclk_q[1] ) ) ; SNN3X4 U273 (.A ( n726 ) , .Z ( n4 ) , .B ( n2 ) , .C ( n641 ) ) ; SOAI22AX4 U274 (.A1 ( n3 ) , .A0 ( n413 ) , .Z ( LVSEL_TXCLK[1] ) , .B0 ( zzeddr_in[0] ) , .B1 ( n4 ) ) ; SNR2X4 U276 (.B ( n24 ) , .Z ( n21 ) , .A ( zzeddr_in[3] ) ) ; SNN3AX4 U97 (.A ( curr_state[2] ) , .Z ( n616 ) , .B ( n80 ) , .C ( n79 ) ) ; SCNN2X4 U98 (.A ( n201 ) , .Z ( n192 ) , .B ( n205 ) ) ; SIVX4 U101 (.Z ( n430 ) , .A ( n172 ) ) ; SIVX4 U102 (.Z ( n288 ) , .A ( n93 ) ) ; SNR2AX4 U105 (.Z ( n179 ) , .A ( IN26 ) , .B ( n439 ) ) ; SNN4X4 U106 (.A ( n56 ) , .Z ( n57 ) , .B ( curr_state[1] ) , .D ( n285 ) , .C ( n79 ) ) ; SIVX4 U107 (.Z ( n285 ) , .A ( curr_state[2] ) ) ; SIVX4 U108 (.Z ( n645 ) , .A ( curr_state[0] ) ) ; SIVX4 U109 (.Z ( n338 ) , .A ( exten_mmslv_jsdsjul_sync2 ) ) ; SIVX4 U111 (.Z ( n225 ) , .A ( micho_1m_jsu_3_ ) ) ; SNN2X4 U113 (.A ( n94 ) , .Z ( n119 ) , .B ( n905 ) ) ; SNN2X4 U114 (.A ( n94 ) , .Z ( n143 ) , .B ( n904 ) ) ; SAO21BZ1X4 U115 (.B ( n350 ) , .ZN ( n96 ) , .A2 ( n534 ) , .A1 ( n673 ) ) ; SAOI222X4 U116 (.C0 ( LVSEL_TXCLK[3] ) , .C1 ( n659 ) , .A0 ( LVSEL_TXSUJUJU[3] ) , .Z ( n67 ) , .A1 ( n660 ) , .B1 ( LVSEL_TXWHTH[3] ) , .B0 ( n662 ) ) ; SNR2X4 U117 (.B ( n162 ) , .Z ( n188 ) , .A ( ops_cal_zzeddr_start ) ) ; SNN2X4 U118 (.A ( n138 ) , .Z ( n176 ) , .B ( n139 ) ) ; SNR2X4 U119 (.B ( n642 ) , .Z ( n106 ) , .A ( n95 ) ) ; SAOI21X4 U120 (.Z ( n174 ) , .A ( n100 ) , .B0 ( n136 ) , .B1 ( n135 ) ) ; SNR2X4 U121 (.B ( n131 ) , .Z ( n198 ) , .A ( n764 ) ) ; SNR2X4 U122 (.B ( n127 ) , .Z ( n139 ) , .A ( n128 ) ) ; SNN2X4 U123 (.A ( n115 ) , .Z ( n127 ) , .B ( n114 ) ) ; SNN2X4 U124 (.A ( n320 ) , .Z ( n124 ) , .B ( n442 ) ) ; SNR2X4 U125 (.B ( n117 ) , .Z ( n120 ) , .A ( n288 ) ) ; SNN2BX4 U126 (.B ( n118 ) , .Z ( n122 ) , .A ( n119 ) ) ; SNN2X4 U127 (.A ( n163 ) , .Z ( n145 ) , .B ( n217 ) ) ; SNN2X4 U128 (.A ( n434 ) , .Z ( n152 ) , .B ( n433 ) ) ; SNR2X4 U129 (.B ( n193 ) , .Z ( n149 ) , .A ( n177 ) ) ; SNN2X4 U130 (.A ( n80 ) , .Z ( n83 ) , .B ( n285 ) ) ; SNR2X4 U131 (.B ( n620 ) , .Z ( n168 ) , .A ( n95 ) ) ; SNN2X4 U132 (.A ( n203 ) , .Z ( n165 ) , .B ( n194 ) ) ; SOA21X4 U133 (.Z ( n217 ) , .A ( n348 ) , .B0 ( n427 ) , .B1 ( n192 ) ) ; SNN2BX4 U134 (.B ( n555 ) , .Z ( n222 ) , .A ( n97 ) ) ; SNN4X4 U135 (.A ( n85 ) , .Z ( n354 ) , .B ( n636 ) , .D ( n642 ) , .C ( n632 ) ) ; SNR2X4 U136 (.B ( n355 ) , .Z ( n85 ) , .A ( n358 ) ) ; SAOI21X4 U137 (.Z ( n211 ) , .A ( n179 ) , .B0 ( n673 ) , .B1 ( cshi_so9 ) ) ; SNN2X4 U138 (.A ( n198 ) , .Z ( n206 ) , .B ( n447 ) ) ; SNR2X4 U139 (.B ( n191 ) , .Z ( n199 ) , .A ( n178 ) ) ; SNR2Z1X4 U140 (.B ( n769 ) , .Z ( n203 ) , .A ( n188 ) ) ; SNR2X4 U141 (.B ( n191 ) , .Z ( n204 ) , .A ( n177 ) ) ; SCNR2X4 U142 (.B ( n99 ) , .Z ( n200 ) , .A ( n179 ) ) ; SAOI21X4 U143 (.Z ( n102 ) , .A ( n100 ) , .B0 ( n135 ) , .B1 ( n101 ) ) ; SNR2X4 U144 (.B ( n83 ) , .Z ( n84 ) , .A ( curr_state[7] ) ) ; SNN2X4 U146 (.A ( n156 ) , .Z ( n385 ) , .B ( n625 ) ) ; SNR2X4 U147 (.B ( n434 ) , .Z ( n156 ) , .A ( n624 ) ) ; SAOI222X4 U148 (.C0 ( LVSEL_TXCLK[4] ) , .C1 ( n659 ) , .A0 ( LVSEL_TXSUJUJU[4] ) , .Z ( n73 ) , .A1 ( n660 ) , .B1 ( LVSEL_TXWHTH[4] ) , .B0 ( n662 ) ) ; SNN2X4 U149 (.A ( n591 ) , .Z ( n256 ) , .B ( n344 ) ) ; SNR2X4 U150 (.B ( n303 ) , .Z ( n254 ) , .A ( n926 ) ) ; SADDFX4 U151 (.S ( n46 ) , .CI ( n899 ) , .A ( zzeddr_in[2] ) , .CO ( n29 ) , .B ( n41 ) ) ; SADDFX4 U152 (.S ( n44 ) , .CI ( n42 ) , .A ( LVSEL_TXCLK[1] ) , .CO ( n33 ) , .B ( n43 ) ) ; SAOI21X4 U153 (.Z ( n6 ) , .A ( n899 ) , .B0 ( zzeddr_in[2] ) , .B1 ( n41 ) ) ; SAOI21Z0X4 U154 (.Z ( n50 ) , .A ( n5 ) , .B0 ( zzeddr_in[2] ) , .B1 ( n899 ) ) ; SAO2B1X4 U155 (.Z ( n88 ) , .B0 ( fm_ana_sq_out_sync2 ) , .B1 ( to_mni_lq_rx_sync2 ) , .A ( jcq_force_no_skip_hsdlfuous_sync2 ) ) ; SNN2X4 U156 (.A ( n120 ) , .Z ( n131 ) , .B ( n98 ) ) ; SAOI21X4 U157 (.Z ( n161 ) , .A ( n347 ) , .B0 ( n673 ) , .B1 ( n430 ) ) ; SNN2X4 U158 (.A ( n628 ) , .Z ( n358 ) , .B ( n624 ) ) ; SNR2X4 U159 (.B ( n97 ) , .Z ( n177 ) , .A ( n192 ) ) ; SNN2X4 U160 (.A ( timeout_jsu_3_ ) , .Z ( n90 ) , .B ( n585 ) ) ; SNR2X4 U161 (.B ( n146 ) , .Z ( n115 ) , .A ( n145 ) ) ; SNR2X4 U162 (.B ( n628 ) , .Z ( n111 ) , .A ( n95 ) ) ; SNR2AX4 U163 (.B ( n435 ) , .Z ( n110 ) , .A ( n293 ) ) ; SAOI222X4 U164 (.C0 ( LVSEL_TXCLK[2] ) , .C1 ( n659 ) , .A0 ( LVSEL_TXSUJUJU[2] ) , .Z ( n652 ) , .A1 ( n660 ) , .B1 ( LVSEL_TXWHTH[2] ) , .B0 ( n662 ) ) ; SAOI222X4 U165 (.C0 ( LVSEL_TXCLK[1] ) , .C1 ( n659 ) , .A0 ( LVSEL_TXSUJUJU[1] ) , .Z ( n658 ) , .A1 ( n660 ) , .B1 ( LVSEL_TXWHTH[1] ) , .B0 ( n662 ) ) ; SNR2X4 U166 (.B ( n101 ) , .Z ( n257 ) , .A ( n674 ) ) ; SNN2X4 U167 (.A ( n673 ) , .Z ( n442 ) , .B ( n765 ) ) ; SNR2X4 U168 (.B ( n257 ) , .Z ( n136 ) , .A ( n326 ) ) ; SNN2BX4 U169 (.B ( n764 ) , .Z ( n132 ) , .A ( n131 ) ) ; SAN3X4 U170 (.Z ( n326 ) , .C ( n327 ) , .B ( n674 ) , .A ( cshi_so24 ) ) ; SNN2X4 U171 (.A ( n141 ) , .Z ( n151 ) , .B ( n140 ) ) ; SNR2X4 U172 (.B ( n674 ) , .Z ( n205 ) , .A ( cshi_so9 ) ) ; SNR2BX4 U173 (.Z ( n76 ) , .B ( curr_state[2] ) , .A ( n79 ) ) ; SNN2X4 U174 (.A ( cal_zzeddr_done ) , .Z ( n189 ) , .B ( n769 ) ) ; SNN2X4 U175 (.A ( n179 ) , .Z ( n193 ) , .B ( n162 ) ) ; SNN2X4 U176 (.A ( n179 ) , .Z ( n197 ) , .B ( n194 ) ) ; SNR2BX4 U177 (.Z ( n80 ) , .B ( curr_state[5] ) , .A ( n77 ) ) ; SNN2X4 U178 (.A ( n253 ) , .Z ( n307 ) , .B ( n302 ) ) ; SNR2X4 U179 (.B ( n302 ) , .Z ( n309 ) , .A ( n253 ) ) ; SNN2X4 U180 (.A ( n773 ) , .Z ( n245 ) , .B ( lvsel_txclk_q[0] ) ) ; SNR2X4 U181 (.B ( n907 ) , .Z ( n613 ) , .A ( n350 ) ) ; SNR2X4 U183 (.B ( n575 ) , .Z ( n273 ) , .A ( n574 ) ) ; SIVX4 U184 (.Z ( n572 ) , .A ( n557 ) ) ; SSDFSX4 lvsel_txintp_q_reg_4_ (.Q ( lvsel_txintp_q[4] ) , .SB ( n68 ) , .CK ( net_ICC_CTS_1__G1B6I66 ) , .D ( n826 ) , .SI ( lvsel_txsujuju_q[1] ) , .SCN ( n398 ) ) ; SSDFSX4 lvsel_rxdig_q_reg_4_ (.Q ( cshi_so10 ) , .SB ( n755 ) , .CK ( net_ICC_CTS_1__G1B6I42 ) , .D ( n836 ) , .SI ( lvsel_rxdig_q_2_ ) , .SCN ( n37 ) ) ; SSDFSX4 lvsel_txdrv_q_reg_4_ (.Q ( lvsel_txdrv_q_4_ ) , .SB ( n755 ) , .CK ( net_ICC_CTS_1__G1B6I43 ) , .D ( n831 ) , .SI ( lvsel_jsdsjul_q[2] ) , .SCN ( IN37 ) ) ; SSDFSX4 curr_state_reg_0_ (.Q ( curr_state[0] ) , .SB ( n757 ) , .CK ( net_ICC_CTS_1__G1B6I40 ) , .D ( n779 ) , .SI ( curr_state[4] ) , .SCN ( n63 ) ) ; SAO2BB2X4 U3 (.A2 ( n285 ) , .ZN ( n795 ) , .A1 ( n906 ) , .B2 ( n284 ) , .B1 ( n906 ) ) ; SAO2BB2X4 U4 (.A2 ( n411 ) , .ZN ( n421 ) , .A1 ( n292 ) , .B2 ( n295 ) , .B1 ( n291 ) ) ; SOAI32X4 U5 (.A1 ( n311 ) , .Z ( n416 ) , .A0 ( n411 ) , .B0 ( int_HIOPSR ) , .B1 ( n344 ) , .B2 ( n312 ) ) ; SNR2X4 U6 (.B ( n307 ) , .Z ( n306 ) , .A ( n310 ) ) ; SNR2X4 U9 (.B ( n171 ) , .Z ( n140 ) , .A ( n430 ) ) ; SNN2BX4 U10 (.B ( n106 ) , .Z ( n173 ) , .A ( n107 ) ) ; SNN2X4 U12 (.A ( n140 ) , .Z ( n117 ) , .B ( n384 ) ) ; SNN2X4 U13 (.A ( n142 ) , .Z ( n159 ) , .B ( n207 ) ) ; SNR2AX4 U14 (.B ( n148 ) , .Z ( n216 ) , .A ( n149 ) ) ; SNN2X4 U15 (.A ( n427 ) , .Z ( n171 ) , .B ( n222 ) ) ; SNR2X4 U16 (.B ( n201 ) , .Z ( n210 ) , .A ( n674 ) ) ; SNN2X4 U17 (.A ( n929 ) , .Z ( n396 ) , .B ( n428 ) ) ; SNN2X4 U18 (.A ( n928 ) , .Z ( n407 ) , .B ( n424 ) ) ; SNR2Z1X4 U19 (.B ( n332 ) , .Z ( n331 ) , .A ( n333 ) ) ; SAO2BB2X4 U20 (.A2 ( n282 ) , .A1 ( n906 ) , .ZN ( n794 ) , .B2 ( n281 ) , .B1 ( n906 ) ) ; SAO2BB2X4 U21 (.A2 ( n581 ) , .A1 ( n926 ) , .ZN ( n858 ) , .B2 ( n907 ) , .B1 ( int_hiopsr_d4 ) ) ; SAOI31AX4 U22 (.Z ( n591 ) , .A ( n907 ) , .B0 ( n230 ) , .B1 ( n407 ) , .B2 ( n396 ) ) ; SAOI31AX4 U23 (.A ( n195 ) , .Z ( n607 ) , .B0 ( ops_cal_zzeddr_start ) , .B1 ( n197 ) , .B2 ( n196 ) ) ; SCIVX4 U26 (.A ( n625 ) , .Z ( n612 ) ) ; SOA2BB2X4 U28 (.A2 ( n930 ) , .ZN ( n103 ) , .A1 ( n198 ) , .B2 ( n174 ) , .B1 ( n674 ) ) ; SOA2BB2X4 U34 (.A2 ( n218 ) , .ZN ( n220 ) , .A1 ( n219 ) , .B2 ( n216 ) , .B1 ( n217 ) ) ; SNN2X4 U35 (.A ( n310 ) , .Z ( n308 ) , .B ( n309 ) ) ; SNR2X4 U36 (.Z ( n87 ) , .A ( n180 ) , .B ( n354 ) ) ; SNN2Z1X4 U37 (.A ( n775 ) , .Z ( n142 ) , .B ( n200 ) ) ; SCIVX4 U38 (.A ( n94 ) , .Z ( n95 ) ) ; SIVX4 U39 (.Z ( n194 ) , .A ( n177 ) ) ; SIVX4 U42 (.Z ( n141 ) , .A ( n384 ) ) ; SIVX4 U44 (.Z ( n337 ) , .A ( n104 ) ) ; SNR2AX4 U45 (.Z ( n359 ) , .A ( n726 ) , .B ( n725 ) ) ; SIVX4 U48 (.Z ( n567 ) , .A ( n565 ) ) ; SIVX4 U49 (.Z ( n585 ) , .A ( n597 ) ) ; SIVX4 U53 (.Z ( n282 ) , .A ( curr_state[3] ) ) ; SIVX4 U54 (.Z ( n606 ) , .A ( curr_state[1] ) ) ; SIVX4 U55 (.Z ( n611 ) , .A ( curr_state[4] ) ) ; SIVX4 U56 (.Z ( n321 ) , .A ( exten_mmslv_rxdig_sync2 ) ) ; SIVX4 U57 (.Z ( n604 ) , .A ( n221 ) ) ; SIVX4 U58 (.Z ( n582 ) , .A ( int_hiopsr_d1 ) ) ; SIVX4 U59 (.Z ( n586 ) , .A ( timeout_jsu_4_ ) ) ; SIVX4 U60 (.Z ( n267 ) , .A ( micho_1m_jsu_2_ ) ) ; SIVX4 U61 (.Z ( n575 ) , .A ( zzeddr_rerun_time_cnt[5] ) ) ; SAO31X4 U62 (.Z ( n201 ) , .B2 ( cshi_so30 ) , .B1 ( to_mni_lq_ivref_sync2 ) , .B0 ( cshi_so37 ) , .A ( jcq_force_no_pause_hsdlfuous_sync2 ) ) ; SIVX4 U63 (.Z ( n327 ) , .A ( exten_mmslv_rxintp_sync2 ) ) ; SIVX4 U65 (.Z ( n522 ) , .A ( cshi_so12 ) ) ; SNR2Z1X4 U67 (.Z ( n340 ) , .A ( n343 ) , .B ( n341 ) ) ; SNN2X4 U68 (.A ( n215 ) , .Z ( n223 ) , .B ( n214 ) ) ; SNR2X4 U69 (.Z ( n214 ) , .A ( n213 ) , .B ( n212 ) ) ; SNR2Z1X4 U70 (.Z ( n313 ) , .A ( n315 ) , .B ( n314 ) ) ; SNR2Z1X4 U71 (.Z ( n328 ) , .A ( n330 ) , .B ( n329 ) ) ; SNR2X4 U72 (.Z ( n215 ) , .A ( n637 ) , .B ( n633 ) ) ; SAOI21X4 U73 (.Z ( n108 ) , .A ( n105 ) , .B0 ( n107 ) , .B1 ( n106 ) ) ; SOAI3B1X4 U74 (.B1 ( n216 ) , .Z ( n633 ) , .A ( n126 ) , .B2 ( n127 ) , .B0 ( n128 ) ) ; SOAI3B1X4 U75 (.B1 ( n138 ) , .Z ( n637 ) , .A ( n137 ) , .B2 ( n216 ) , .B0 ( n139 ) ) ; SOA32X4 U77 (.Z ( n207 ) , .A1 ( n674 ) , .A0 ( n173 ) , .B0 ( n102 ) , .B1 ( n674 ) , .B2 ( n763 ) ) ; SAOI21X4 U80 (.Z ( n148 ) , .A ( n772 ) , .B0 ( n189 ) , .B1 ( n197 ) ) ; SCNN2X4 U82 (.A ( n906 ) , .Z ( n406 ) , .B ( n775 ) ) ; SOA211X4 U84 (.Z ( n287 ) , .A ( n758 ) , .B ( n228 ) , .C0 ( cshi_so28 ) , .C1 ( n229 ) ) ; SNR2X4 U86 (.B ( n374 ) , .Z ( n240 ) , .A ( n642 ) ) ; SNN3AX4 U88 (.A ( curr_state[6] ) , .Z ( n632 ) , .B ( n86 ) , .C ( n604 ) ) ; SNN3AX4 U89 (.A ( curr_state[4] ) , .Z ( n624 ) , .B ( n989 ) , .C ( n282 ) ) ; SAOI21X4 U91 (.Z ( n350 ) , .A ( n92 ) , .B0 ( max_min_d1 ) , .B1 ( max_min_d2 ) ) ; SSDFRX4 HIOPSR_jsu_1M_div1024_reg_3_ (.Q ( HIOPSR_jsu_1M_div1024_3_ ) , .RB ( n730 ) , .CK ( net_ICC_CTS_1__G1B6I48 ) , .SI ( HIOPSR_jsu_1M_div1024_2_ ) , .D ( n877 ) , .SCN ( n190 ) ) ; SSDFRX4 HIOPSR_jsu_1M_div1024_reg_2_ (.Q ( HIOPSR_jsu_1M_div1024_2_ ) , .RB ( n730 ) , .CK ( net_ICC_CTS_1__G1B6I48 ) , .SI ( HIOPSR_jsu_1M_div128_1_ ) , .D ( n878 ) , .SCN ( n190 ) ) ; SSDFRX4 HIOPSR_jsu_1M_div1024_reg_1_ (.Q ( HIOPSR_jsu_1M_div1024_1_ ) , .RB ( n22 ) , .CK ( net_ICC_CTS_1__G1B6I48 ) , .SI ( zzeddr_rerun_time_cnt[2] ) , .D ( n879 ) , .SCN ( n190 ) ) ; SSDFRX4 HIOPSR_jsu_1M_div1024_reg_0_ (.Q ( HIOPSR_jsu_1M_div1024_0_ ) , .RB ( n22 ) , .CK ( net_ICC_CTS_1__G1B6I48 ) , .SI ( HIOPSR_jsu_1M_div1024_9_ ) , .D ( n880 ) , .SCN ( n190 ) ) ; SSDFRX4 int_HIOPSR_reg (.Q ( int_HIOPSR ) , .RB ( n22 ) , .CK ( net_ICC_CTS_1__G1B6I69 ) , .SI ( HIOPSR_jsu_1M_div8[2] ) , .D ( n870 ) , .SCN ( n394 ) ) ; SSDFRX4 lvsel_txclk_q_reg_3_ (.Q ( lvsel_txclk_q[3] ) , .RB ( n755 ) , .CK ( net_ICC_CTS_1__G1B6I43 ) , .SI ( lvsel_txclk_q[4] ) , .D ( n817 ) , .SCN ( n398 ) ) ; SSDFRX4 max_min_d2_reg (.Q ( max_min_d2 ) , .RB ( n181 ) , .CK ( net_ICC_CTS_1__G1B6I68 ) , .SI ( txdrv_st_done ) , .D ( n856 ) , .SCN ( n64 ) ) ; SSDFRX4 zzeddr_rerun_time_jsu_reg_6_ (.Q ( zzeddr_rerun_time_cnt[6] ) , .RB ( n22 ) , .CK ( net_ICC_CTS_1__G1B6I69 ) , .SI ( zzeddr_rerun_time_cnt[3] ) , .D ( n862 ) , .SCN ( n394 ) ) ; SSDFRX4 zzeddr_rerun_time_jsu_reg_7_ (.Q ( zzeddr_rerun_time_cnt[7] ) , .RB ( n22 ) , .CK ( net_ICC_CTS_1__G1B6I68 ) , .SI ( int_hiopsr_d1 ) , .D ( n869 ) , .SCN ( n394 ) ) ; SSDFRX4 zzeddr_rerun_time_jsu_reg_0_ (.Q ( zzeddr_rerun_time_cnt[0] ) , .RB ( n22 ) , .CK ( net_ICC_CTS_1__G1B6I69 ) , .SI ( zzeddr_rerun_time_cnt[5] ) , .D ( n868 ) , .SCN ( n394 ) ) ; SSDFRX4 zzeddr_rerun_time_jsu_reg_1_ (.Q ( zzeddr_rerun_time_cnt[1] ) , .RB ( n22 ) , .CK ( net_ICC_CTS_1__G1B6I69 ) , .SI ( zzeddr_rerun_time_cnt[0] ) , .D ( n867 ) , .SCN ( n394 ) ) ; SSDFRX4 zzeddr_rerun_time_jsu_reg_2_ (.Q ( zzeddr_rerun_time_cnt[2] ) , .RB ( n22 ) , .CK ( net_ICC_CTS_1__G1B6I69 ) , .SI ( zzeddr_rerun_time_cnt[1] ) , .D ( n866 ) , .SCN ( n394 ) ) ; SSDFRX4 zzeddr_rerun_time_jsu_reg_3_ (.Q ( zzeddr_rerun_time_cnt[3] ) , .RB ( n22 ) , .CK ( net_ICC_CTS_1__G1B6I69 ) , .SI ( int_HIOPSR ) , .D ( n865 ) , .SCN ( n394 ) ) ; SSDFRX4 zzeddr_rerun_time_jsu_reg_4_ (.Q ( zzeddr_rerun_time_cnt[4] ) , .RB ( n22 ) , .CK ( net_ICC_CTS_1__G1B6I69 ) , .SI ( HIOPSR_jsu_1M_div128_5_ ) , .D ( n864 ) , .SCN ( n394 ) ) ; SSDFRX4 zzeddr_rerun_time_jsu_reg_5_ (.Q ( zzeddr_rerun_time_cnt[5] ) , .RB ( n22 ) , .CK ( net_ICC_CTS_1__G1B6I69 ) , .SI ( zzeddr_rerun_time_cnt[6] ) , .D ( n863 ) , .SCN ( n394 ) ) ; SSDFRX4 lvsel_txsujuju_q_reg_3_ (.Q ( lvsel_txsujuju_q[3] ) , .RB ( n68 ) , .CK ( net_ICC_CTS_1__G1B6I66 ) , .SI ( timeout_jsu_2_ ) , .D ( n822 ) , .SCN ( n398 ) ) ; SSDFRX4 lvsel_rxintp_q_reg_3_ (.Q ( lvsel_rxintp_q_3_ ) , .RB ( n755 ) , .CK ( net_ICC_CTS_1__G1B6I67 ) , .SI ( lvsel_rxintp_q_4_ ) , .D ( n842 ) , .SCN ( n398 ) ) ; SSDFRX4 lvsel_rxdig_q_reg_3_ (.Q ( lvsel_rxdig_q_3_ ) , .RB ( n755 ) , .CK ( net_ICC_CTS_1__G1B6I67 ) , .SI ( lvsel_txdrv_q_2_ ) , .D ( n837 ) , .SCN ( n398 ) ) ; SSDFRX4 lvsel_jsdsjul_q_reg_3_ (.Q ( lvsel_jsdsjul_q[3] ) , .RB ( n755 ) , .CK ( net_ICC_CTS_1__G1B6I67 ) , .SI ( cshi_si24 ) , .D ( n847 ) , .SCN ( n37 ) ) ; SSDFRX4 lvsel_txdrv_q_reg_3_ (.Q ( lvsel_txdrv_q_3_ ) , .RB ( n755 ) , .CK ( net_ICC_CTS_1__G1B6I43 ) , .SI ( lvsel_txclk_q[2] ) , .D ( n832 ) , .SCN ( n398 ) ) ; SSDFRX4 int_hiopsr_d1_reg (.Q ( int_hiopsr_d1 ) , .RB ( n22 ) , .CK ( net_ICC_CTS_1__G1B6I68 ) , .SI ( timeout_jsu_4_ ) , .D ( n861 ) , .SCN ( n394 ) ) ; SSDFRX4 int_hiopsr_d2_reg (.Q ( int_hiopsr_d2 ) , .RB ( n181 ) , .CK ( net_ICC_CTS_1__G1B6I68 ) , .SI ( curr_state[8] ) , .D ( n859 ) , .SCN ( n394 ) ) ; SSDFRX4 int_hiopsr_d3_reg (.Q ( int_hiopsr_d3 ) , .RB ( n181 ) , .CK ( net_ICC_CTS_1__G1B6I68 ) , .SI ( int_hiopsr_d2 ) , .D ( n860 ) , .SCN ( n394 ) ) ; SSDFRX4 int_hiopsr_d4_reg (.Q ( int_hiopsr_d4 ) , .RB ( n181 ) , .CK ( net_ICC_CTS_1__G1B6I68 ) , .SI ( n221 ) , .D ( n858 ) , .SCN ( n394 ) ) ; SSDFRX4 max_min_d1_reg (.Q ( max_min_d1 ) , .RB ( n68 ) , .CK ( net_ICC_CTS_1__G1B6I66 ) , .SI ( txclk_st_done ) , .D ( n857 ) , .SCN ( n398 ) ) ; SSDFRX4 timeout_jsu_reg_4_ (.Q ( timeout_jsu_4_ ) , .RB ( n181 ) , .CK ( net_ICC_CTS_1__G1B6I68 ) , .SI ( int_hiopsr_d4 ) , .D ( n855 ) , .SCN ( n394 ) ) ; SSDFRX4 timeout_jsu_reg_0_ (.Q ( timeout_jsu_0_ ) , .RB ( n68 ) , .CK ( net_ICC_CTS_1__G1B6I66 ) , .SI ( max_min_d1 ) , .D ( n854 ) , .SCN ( n398 ) ) ; SSDFRX4 timeout_jsu_reg_1_ (.Q ( cshi_so16 ) , .RB ( n68 ) , .CK ( net_ICC_CTS_1__G1B6I66 ) , .SI ( cshi_si29 ) , .D ( n853 ) , .SCN ( n398 ) ) ; SSDFRX4 timeout_jsu_reg_2_ (.Q ( timeout_jsu_2_ ) , .RB ( n68 ) , .CK ( net_ICC_CTS_1__G1B6I66 ) , .SI ( cshi_so16 ) , .D ( n261 ) , .SCN ( n398 ) ) ; SSDFRX4 timeout_jsu_reg_3_ (.Q ( timeout_jsu_3_ ) , .RB ( n181 ) , .CK ( net_ICC_CTS_1__G1B6I68 ) , .SI ( int_hiopsr_d3 ) , .D ( n851 ) , .SCN ( n64 ) ) ; SSDFRX4 lvsel_txintp_q_reg_0_ (.Q ( lvsel_txintp_q[0] ) , .RB ( n755 ) , .CK ( net_ICC_CTS_1__G1B6I43 ) , .SI ( lvsel_txclk_q[0] ) , .D ( n830 ) , .SCN ( n398 ) ) ; SSDFRX4 lvsel_jsdsjul_q_reg_0_ (.Q ( lvsel_jsdsjul_q[0] ) , .RB ( n755 ) , .CK ( net_ICC_CTS_1__G1B6I67 ) , .SI ( lvsel_jsdsjul_q[3] ) , .D ( n850 ) , .SCN ( n37 ) ) ; SSDFRX4 lvsel_rxintp_q_reg_0_ (.Q ( cshi_so14 ) , .RB ( n755 ) , .CK ( net_ICC_CTS_1__G1B6I67 ) , .SI ( lvsel_rxintp_q_3_ ) , .D ( n845 ) , .SCN ( n398 ) ) ; SSDFRX4 lvsel_rxdig_q_reg_0_ (.Q ( lvsel_rxdig_q_0_ ) , .RB ( n755 ) , .CK ( net_ICC_CTS_1__G1B6I42 ) , .SI ( cshi_so10 ) , .D ( n840 ) , .SCN ( n37 ) ) ; SSDFRX4 lvsel_txdrv_q_reg_0_ (.Q ( lvsel_txdrv_q_0_ ) , .RB ( n755 ) , .CK ( net_ICC_CTS_1__G1B6I42 ) , .SI ( lvsel_rxdig_q_0_ ) , .D ( n835 ) , .SCN ( IN37 ) ) ; SSDFRX4 lvsel_txsujuju_q_reg_0_ (.Q ( lvsel_txsujuju_q[0] ) , .RB ( n755 ) , .CK ( net_ICC_CTS_1__G1B6I43 ) , .SI ( lvsel_txintp_q[0] ) , .D ( n825 ) , .SCN ( n398 ) ) ; SSDFRX4 lvsel_txclk_q_reg_0_ (.Q ( lvsel_txclk_q[0] ) , .RB ( n755 ) , .CK ( net_ICC_CTS_1__G1B6I43 ) , .SI ( lvsel_txclk_q[1] ) , .D ( n820 ) , .SCN ( n398 ) ) ; SSDFRX4 lvsel_txintp_q_reg_1_ (.Q ( lvsel_txintp_q[1] ) , .RB ( n755 ) , .CK ( net_ICC_CTS_1__G1B6I66 ) , .SI ( lvsel_txintp_q[2] ) , .D ( n829 ) , .SCN ( n398 ) ) ; SSDFRX4 lvsel_jsdsjul_q_reg_1_ (.Q ( lvsel_jsdsjul_q[1] ) , .RB ( n755 ) , .CK ( net_ICC_CTS_1__G1B6I67 ) , .SI ( lvsel_jsdsjul_q[4] ) , .D ( n849 ) , .SCN ( n37 ) ) ; SSDFRX4 lvsel_rxintp_q_reg_1_ (.Q ( lvsel_rxintp_q_1_ ) , .RB ( n755 ) , .CK ( net_ICC_CTS_1__G1B6I67 ) , .SI ( cshi_so15 ) , .D ( n844 ) , .SCN ( n398 ) ) ; SSDFRX4 lvsel_rxdig_q_reg_1_ (.Q ( lvsel_rxdig_q_1_ ) , .RB ( n755 ) , .CK ( net_ICC_CTS_1__G1B6I42 ) , .SI ( lvsel_txdrv_q_3_ ) , .D ( n839 ) , .SCN ( IN37 ) ) ; SSDFRX4 lvsel_txdrv_q_reg_1_ (.Q ( cshi_so25 ) , .RB ( n755 ) , .CK ( net_ICC_CTS_1__G1B6I42 ) , .SI ( lvsel_txdrv_q_0_ ) , .D ( n834 ) , .SCN ( n37 ) ) ; SSDFRX4 lvsel_txsujuju_q_reg_1_ (.Q ( lvsel_txsujuju_q[1] ) , .RB ( n68 ) , .CK ( net_ICC_CTS_1__G1B6I66 ) , .SI ( rxintp_st_done ) , .D ( n824 ) , .SCN ( n398 ) ) ; SSDFRX4 lvsel_txclk_q_reg_1_ (.Q ( lvsel_txclk_q[1] ) , .RB ( n755 ) , .CK ( net_ICC_CTS_1__G1B6I66 ) , .SI ( lvsel_txintp_q[1] ) , .D ( n819 ) , .SCN ( n398 ) ) ; SSDFRX4 lvsel_txintp_q_reg_2_ (.Q ( lvsel_txintp_q[2] ) , .RB ( n68 ) , .CK ( net_ICC_CTS_1__G1B6I66 ) , .SI ( lvsel_txintp_q[3] ) , .D ( n828 ) , .SCN ( n398 ) ) ; SSDFRX4 lvsel_jsdsjul_q_reg_2_ (.Q ( lvsel_jsdsjul_q[2] ) , .RB ( n755 ) , .CK ( net_ICC_CTS_1__G1B6I67 ) , .SI ( lvsel_jsdsjul_q[1] ) , .D ( n848 ) , .SCN ( n37 ) ) ; SSDFRX4 lvsel_rxintp_q_reg_2_ (.Q ( cshi_so15 ) , .RB ( n755 ) , .CK ( net_ICC_CTS_1__G1B6I67 ) , .SI ( cshi_si14 ) , .D ( n843 ) , .SCN ( n398 ) ) ; SSDFRX4 lvsel_rxdig_q_reg_2_ (.Q ( lvsel_rxdig_q_2_ ) , .RB ( n755 ) , .CK ( net_ICC_CTS_1__G1B6I42 ) , .SI ( lvsel_rxdig_q_1_ ) , .D ( n838 ) , .SCN ( n398 ) ) ; SSDFRX4 lvsel_txdrv_q_reg_2_ (.Q ( lvsel_txdrv_q_2_ ) , .RB ( n755 ) , .CK ( net_ICC_CTS_1__G1B6I43 ) , .SI ( lvsel_txsujuju_q[4] ) , .D ( n833 ) , .SCN ( n398 ) ) ; SSDFRX4 lvsel_txsujuju_q_reg_2_ (.Q ( lvsel_txsujuju_q[2] ) , .RB ( n68 ) , .CK ( net_ICC_CTS_1__G1B6I66 ) , .SI ( lvsel_txsujuju_q[3] ) , .D ( n823 ) , .SCN ( n398 ) ) ; SSDFRX4 lvsel_txclk_q_reg_2_ (.Q ( lvsel_txclk_q[2] ) , .RB ( n755 ) , .CK ( net_ICC_CTS_1__G1B6I43 ) , .SI ( lvsel_txclk_q[3] ) , .D ( n818 ) , .SCN ( n398 ) ) ; SSDFRX4 lvsel_txintp_q_reg_3_ (.Q ( lvsel_txintp_q[3] ) , .RB ( n68 ) , .CK ( net_ICC_CTS_1__G1B6I66 ) , .SI ( lvsel_txintp_q[4] ) , .D ( n827 ) , .SCN ( n398 ) ) ; SSDFRX4 micho_1m_jsu_reg_9_ (.Q ( cshi_so18 ) , .RB ( n730 ) , .CK ( ref_clk_cts_6 ) , .SI ( cshi_si31 ) , .D ( n815 ) , .SCN ( IN35 ) ) ; SSDFRX4 micho_1m_jsu_reg_8_ (.Q ( cshi_so33 ) , .RB ( n730 ) , .CK ( ref_clk_cts_6 ) , .SI ( cshi_so18 ) , .D ( n814 ) , .SCN ( IN35 ) ) ; SSDFRX4 micho_1m_jsu_reg_7_ (.Q ( micho_1m_jsu_7_ ) , .RB ( n730 ) , .CK ( ref_clk_cts_6 ) , .SI ( micho_1m_jsu_3_ ) , .D ( n813 ) , .SCN ( IN35 ) ) ; SSDFRX4 micho_1m_jsu_reg_6_ (.Q ( micho_1m_jsu_6_ ) , .RB ( n757 ) , .CK ( ref_clk_cts_6 ) , .SI ( micho_1m_jsu_7_ ) , .D ( n812 ) , .SCN ( IN27 ) ) ; SSDFRX4 micho_1m_jsu_reg_5_ (.Q ( cshi_so19 ) , .RB ( n730 ) , .CK ( ref_clk_cts_6 ) , .SI ( micho_1m_jsu_6_ ) , .D ( n811 ) , .SCN ( IN27 ) ) ; SSDFRX4 micho_1m_jsu_reg_4_ (.Q ( cshi_so32 ) , .RB ( n757 ) , .CK ( ref_clk_cts_9 ) , .SI ( micho_1m_jsu_0_ ) , .D ( n810 ) , .SCN ( IN27 ) ) ; SSDFRX4 micho_1m_jsu_reg_3_ (.Q ( micho_1m_jsu_3_ ) , .RB ( n730 ) , .CK ( ref_clk_cts_6 ) , .SI ( cshi_so17 ) , .D ( n809 ) , .SCN ( IN27 ) ) ; SSDFRX4 micho_1m_jsu_reg_2_ (.Q ( micho_1m_jsu_2_ ) , .RB ( n730 ) , .CK ( ref_clk_cts_9 ) , .SI ( micho_1m_jsu_1_ ) , .D ( n808 ) , .SCN ( n394 ) ) ; SSDFRX4 micho_1m_jsu_reg_1_ (.Q ( micho_1m_jsu_1_ ) , .RB ( n757 ) , .CK ( ref_clk_cts_9 ) , .SI ( cshi_si6 ) , .D ( n807 ) , .SCN ( IN27 ) ) ; SSDFRX4 micho_1m_jsu_reg_0_ (.Q ( micho_1m_jsu_0_ ) , .RB ( n730 ) , .CK ( ref_clk_cts_9 ) , .SI ( micho_1m_jsu_2_ ) , .D ( n806 ) , .SCN ( n394 ) ) ; SSDFRX4 ops_cal_start_sync1_reg (.Q ( ops_cal_start_sync1 ) , .RB ( n757 ) , .CK ( ref_clk_cts_3 ) , .SI ( ops_cal_start_sync2 ) , .D ( n805 ) , .SCN ( n48 ) ) ; SSDFRX4 ops_cal_start_sync2_reg (.Q ( ops_cal_start_sync2 ) , .RB ( n757 ) , .CK ( ref_clk_cts_3 ) , .SI ( dly_curr_txsujuju_st ) , .D ( n804 ) , .SCN ( n48 ) ) ; SSDFRX4 ops_cal_start_sync3_reg (.Q ( cshi_so7 ) , .RB ( n757 ) , .CK ( ref_clk_cts_3 ) , .SI ( cshi_si7 ) , .D ( n803 ) , .SCN ( IN27 ) ) ; SSDFRX4 dly_curr_jsdsjul_st_reg (.Q ( dly_curr_jsdsjul_st ) , .RB ( n757 ) , .CK ( ref_clk_cts_3 ) , .SI ( cshi_so13 ) , .D ( n802 ) , .SCN ( n48 ) ) ; SSDFRX4 curr_state_reg_9_ (.Q ( curr_state[9] ) , .RB ( n181 ) , .CK ( net_ICC_CTS_1__G1B6I68 ) , .SI ( cshi_so7 ) , .D ( n801 ) , .SCN ( n394 ) ) ; SSDFRX4 dly_curr_txclk_st_reg (.Q ( dly_curr_txclk_st ) , .RB ( n757 ) , .CK ( net_ICC_CTS_1__G1B6I40 ) , .SI ( curr_state[1] ) , .D ( n800 ) , .SCN ( n48 ) ) ; SSDFRX4 curr_state_reg_1_ (.Q ( curr_state[1] ) , .RB ( n22 ) , .CK ( net_ICC_CTS_1__G1B6I40 ) , .SI ( curr_state[3] ) , .D ( n799 ) , .SCN ( n63 ) ) ; SSDFRX4 dly_curr_txsujuju_st_reg (.Q ( dly_curr_txsujuju_st ) , .RB ( n757 ) , .CK ( ref_clk_cts_3 ) , .SI ( exten_mmslv_txdrv_sync2 ) , .D ( n798 ) , .SCN ( n48 ) ) ; SSDFRX4 curr_state_reg_7_ (.Q ( curr_state[7] ) , .RB ( n181 ) , .CK ( net_ICC_CTS_1__G1B6I68 ) , .SI ( curr_state[6] ) , .D ( n797 ) , .SCN ( n394 ) ) ; SSDFRX4 curr_state_reg_5_ (.Q ( curr_state[5] ) , .RB ( n757 ) , .CK ( net_ICC_CTS_1__G1B6I40 ) , .SI ( zzeddr_rerun_time_cnt[7] ) , .D ( n796 ) , .SCN ( n63 ) ) ; SSDFRX4 curr_state_reg_2_ (.Q ( curr_state[2] ) , .RB ( n22 ) , .CK ( net_ICC_CTS_1__G1B6I40 ) , .SI ( dly_curr_jsdsjul_st ) , .D ( n795 ) , .SCN ( n63 ) ) ; SSDFRX4 curr_state_reg_3_ (.Q ( curr_state[3] ) , .RB ( n757 ) , .CK ( net_ICC_CTS_1__G1B6I40 ) , .SI ( curr_state[0] ) , .D ( n794 ) , .SCN ( n63 ) ) ; SSDFRX4 dly_curr_txdrv_st_reg (.Q ( dly_curr_txdrv_st ) , .RB ( n757 ) , .CK ( net_ICC_CTS_1__G1B6I40 ) , .SI ( dly_curr_txclk_st ) , .D ( n793 ) , .SCN ( n63 ) ) ; SSDFRX4 curr_state_reg_4_ (.Q ( curr_state[4] ) , .RB ( n22 ) , .CK ( net_ICC_CTS_1__G1B6I69 ) , .SI ( cshi_si32 ) , .D ( n792 ) , .SCN ( n394 ) ) ; SSDFRX4 dly_curr_txintp_st_reg (.Q ( cshi_so34 ) , .RB ( n757 ) , .CK ( ref_clk_cts_3 ) , .SI ( ops_cal_start_sync1 ) , .D ( n791 ) , .SCN ( n48 ) ) ; SSDFRX4 curr_state_reg_6_ (.Q ( curr_state[6] ) , .RB ( n181 ) , .CK ( net_ICC_CTS_1__G1B6I68 ) , .SI ( timeout_jsu_3_ ) , .D ( n790 ) , .SCN ( n394 ) ) ; SSDFRX4 curr_state_reg_8_ (.Q ( curr_state[8] ) , .RB ( n22 ) , .CK ( net_ICC_CTS_1__G1B6I41 ) , .SI ( dly_curr_rxdig_st ) , .D ( n789 ) , .SCN ( n394 ) ) ; SSDFRX4 dly_curr_rxdig_st_reg (.Q ( dly_curr_rxdig_st ) , .RB ( n757 ) , .CK ( net_ICC_CTS_1__G1B6I41 ) , .SI ( dly_curr_rxintp_st ) , .D ( n788 ) , .SCN ( n394 ) ) ; SSDFRX4 dly_curr_rxintp_st_reg (.Q ( dly_curr_rxintp_st ) , .RB ( n757 ) , .CK ( net_ICC_CTS_1__G1B6I41 ) , .SI ( curr_state[2] ) , .D ( n787 ) , .SCN ( n63 ) ) ; SSDFRX4 txclk_st_done_reg (.Q ( txclk_st_done ) , .RB ( n755 ) , .CK ( net_ICC_CTS_1__G1B6I66 ) , .SI ( txsujuju_st_done ) , .D ( n786 ) , .SCN ( n398 ) ) ; SSDFRX4 txsujuju_st_done_reg (.Q ( txsujuju_st_done ) , .RB ( n68 ) , .CK ( net_ICC_CTS_1__G1B6I68 ) , .SI ( max_min_d2 ) , .D ( n785 ) , .SCN ( n398 ) ) ; SSDFRX4 txintp_st_done_reg (.Q ( txintp_st_done ) , .RB ( reset ) , .CK ( net_ICC_CTS_1__G1B6I65 ) , .SI ( rxdig_st_done ) , .D ( n784 ) , .SCN ( IN42 ) ) ; SSDFRX4 txdrv_st_done_reg (.Q ( txdrv_st_done ) , .RB ( n68 ) , .CK ( net_ICC_CTS_1__G1B6I68 ) , .SI ( curr_state[7] ) , .D ( n783 ) , .SCN ( n64 ) ) ; SSDFRX4 rxdig_st_done_reg (.Q ( rxdig_st_done ) , .RB ( n755 ) , .CK ( net_ICC_CTS_1__G1B6I65 ) , .SI ( lvsel_txsujuju_q[0] ) , .D ( n782 ) , .SCN ( IN42 ) ) ; SSDFRX4 rxintp_st_done_reg (.Q ( rxintp_st_done ) , .RB ( n68 ) , .CK ( net_ICC_CTS_1__G1B6I66 ) , .SI ( timeout_jsu_0_ ) , .D ( n781 ) , .SCN ( n398 ) ) ; SSDFRX4 jsdsjul_st_done_reg (.Q ( cshi_so27 ) , .RB ( n757 ) , .CK ( net_ICC_CTS_1__G1B6I65 ) , .SI ( txintp_st_done ) , .D ( n780 ) , .SCN ( IN42 ) ) ; SDFRX4 HIOPSR_sync2_reg (.Q ( cshi_so4 ) , .RB ( n22 ) , .D ( net40 ) , .CK ( net_ICC_CTS_1__G1B6I40 ) ) ; SSDFSX4 lvsel_txclk_q_reg_4_ (.Q ( lvsel_txclk_q[4] ) , .SB ( n755 ) , .CK ( net_ICC_CTS_1__G1B6I43 ) , .D ( n816 ) , .SI ( lvsel_txdrv_q_4_ ) , .SCN ( n398 ) ) ; SSDFSX4 lvsel_txsujuju_q_reg_4_ (.Q ( lvsel_txsujuju_q[4] ) , .SB ( n68 ) , .CK ( net_ICC_CTS_1__G1B6I66 ) , .D ( n821 ) , .SI ( lvsel_txsujuju_q[2] ) , .SCN ( n398 ) ) ; SSDFSX4 lvsel_jsdsjul_q_reg_4_ (.Q ( lvsel_jsdsjul_q[4] ) , .SB ( n755 ) , .CK ( net_ICC_CTS_1__G1B6I67 ) , .D ( n846 ) , .SI ( lvsel_jsdsjul_q[0] ) , .SCN ( n37 ) ) ; SSDFSX4 lvsel_rxintp_q_reg_4_ (.Q ( lvsel_rxintp_q_4_ ) , .SB ( n755 ) , .CK ( net_ICC_CTS_1__G1B6I67 ) , .D ( n841 ) , .SI ( lvsel_rxintp_q_1_ ) , .SCN ( n398 ) ) ; SSDFRX4 HIOPSR_sync1_reg (.Q ( HIOPSR_sync1 ) , .RB ( n22 ) , .CK ( net_ICC_CTS_1__G1B6I40 ) , .SI ( dly_curr_txdrv_st ) , .D ( HIOPSR ) , .SCN ( n63 ) ) ; SSDFRX4 HIOPSR_jsu_1M_div8_reg_0_ (.Q ( HIOPSR_jsu_1M_div8[0] ) , .RB ( n730 ) , .CK ( net_ICC_CTS_1__G1B6I48 ) , .SI ( HIOPSR_jsu_1M_div1024_0_ ) , .D ( n890 ) , .SCN ( n394 ) ) ; SSDFRX4 HIOPSR_jsu_1M_div8_reg_1_ (.Q ( HIOPSR_jsu_1M_div8[1] ) , .RB ( n22 ) , .CK ( net_ICC_CTS_1__G1B6I69 ) , .SI ( HIOPSR_jsu_1M_div128_3_ ) , .D ( n889 ) , .SCN ( n394 ) ) ; SSDFRX4 HIOPSR_jsu_1M_div8_reg_2_ (.Q ( HIOPSR_jsu_1M_div8[2] ) , .RB ( n22 ) , .CK ( net_ICC_CTS_1__G1B6I69 ) , .SI ( HIOPSR_jsu_1M_div8[1] ) , .D ( n888 ) , .SCN ( n394 ) ) ; SSDFRX4 HIOPSR_jsu_1M_div128_reg_6_ (.Q ( HIOPSR_jsu_1M_div128_6_ ) , .RB ( n22 ) , .CK ( net_ICC_CTS_1__G1B6I69 ) , .SI ( zzeddr_rerun_time_cnt[4] ) , .D ( n881 ) , .SCN ( n394 ) ) ; SSDFRX4 HIOPSR_jsu_1M_div128_reg_5_ (.Q ( HIOPSR_jsu_1M_div128_5_ ) , .RB ( n22 ) , .CK ( net_ICC_CTS_1__G1B6I69 ) , .SI ( curr_state[5] ) , .D ( n882 ) , .SCN ( n394 ) ) ; SSDFRX4 HIOPSR_jsu_1M_div128_reg_4_ (.Q ( HIOPSR_jsu_1M_div128_4_ ) , .RB ( n22 ) , .CK ( net_ICC_CTS_1__G1B6I69 ) , .SI ( HIOPSR_jsu_1M_div128_6_ ) , .D ( n883 ) , .SCN ( n394 ) ) ; SSDFRX4 HIOPSR_jsu_1M_div128_reg_3_ (.Q ( HIOPSR_jsu_1M_div128_3_ ) , .RB ( n22 ) , .CK ( net_ICC_CTS_1__G1B6I69 ) , .SI ( HIOPSR_jsu_1M_div128_4_ ) , .D ( n884 ) , .SCN ( n394 ) ) ; SSDFRX4 HIOPSR_jsu_1M_div128_reg_2_ (.Q ( HIOPSR_jsu_1M_div128_2_ ) , .RB ( n730 ) , .CK ( net_ICC_CTS_1__G1B6I48 ) , .SI ( HIOPSR_jsu_1M_div1024_1_ ) , .D ( n885 ) , .SCN ( n394 ) ) ; SSDFRX4 HIOPSR_jsu_1M_div128_reg_1_ (.Q ( HIOPSR_jsu_1M_div128_1_ ) , .RB ( n730 ) , .CK ( net_ICC_CTS_1__G1B6I48 ) , .SI ( HIOPSR_jsu_1M_div128_2_ ) , .D ( n886 ) , .SCN ( n190 ) ) ; SSDFRX4 HIOPSR_jsu_1M_div128_reg_0_ (.Q ( cshi_so35 ) , .RB ( n22 ) , .CK ( net_ICC_CTS_1__G1B6I48 ) , .SI ( HIOPSR_jsu_1M_div8[0] ) , .D ( n887 ) , .SCN ( n394 ) ) ; SSDFRX4 HIOPSR_jsu_1M_div1024_reg_9_ (.Q ( HIOPSR_jsu_1M_div1024_9_ ) , .RB ( n22 ) , .CK ( net_ICC_CTS_1__G1B6I48 ) , .SI ( HIOPSR_jsu_1M_div1024_4_ ) , .D ( n871 ) , .SCN ( n190 ) ) ; SSDFRX4 HIOPSR_jsu_1M_div1024_reg_8_ (.Q ( HIOPSR_jsu_1M_div1024_8_ ) , .RB ( n22 ) , .CK ( ref_clk_cts_4 ) , .SI ( cshi_so22 ) , .D ( n872 ) , .SCN ( n190 ) ) ; SSDFRX4 HIOPSR_jsu_1M_div1024_reg_7_ (.Q ( cshi_so21 ) , .RB ( n22 ) , .CK ( ref_clk_cts_4 ) , .SI ( HIOPSR_jsu_1M_div1024_8_ ) , .D ( n873 ) , .SCN ( n190 ) ) ; SSDFRX4 HIOPSR_jsu_1M_div1024_reg_6_ (.Q ( cshi_so36 ) , .RB ( n22 ) , .CK ( ref_clk_cts_4 ) , .SI ( cshi_so21 ) , .D ( n874 ) , .SCN ( n190 ) ) ; SSDFRX4 HIOPSR_jsu_1M_div1024_reg_5_ (.Q ( cshi_so22 ) , .RB ( n22 ) , .CK ( ref_clk_cts_4 ) , .SI ( cshi_si35 ) , .D ( n875 ) , .SCN ( n190 ) ) ; SSDFRX4 HIOPSR_jsu_1M_div1024_reg_4_ (.Q ( HIOPSR_jsu_1M_div1024_4_ ) , .RB ( n22 ) , .CK ( net_ICC_CTS_1__G1B6I48 ) , .SI ( HIOPSR_jsu_1M_div1024_3_ ) , .D ( n876 ) , .SCN ( n190 ) ) ; SNN2AX4 place_5 (.A ( n988 ) , .Z ( n620 ) , .B ( n81 ) ) ; SAN2X4 place_7 (.Z ( n988 ) , .B ( n611 ) , .A ( curr_state[3] ) ) ; SAN2X4 place_8 (.Z ( n981 ) , .B ( n207 ) , .A ( n142 ) ) ; SAO22X4 place_25 (.Z ( n986 ) , .A1 ( lvsel_jsdsjul_q[0] ) , .A0 ( n766 ) , .B0 ( n375 ) , .B1 ( ext_mmslv_jsdsjul[0] ) ) ; SCBUFX4 cts_psyn_2 (.A ( to_mni_lq_pll_sync2 ) , .Z ( cshi_so30 ) ) ; SCBUFX4 cts_psyn_3 (.A ( jcq_cal_ops_calen_jsdsjul_sync2[1] ) , .Z ( cshi_so26 ) ) ; SCBUFX4 cts_psyn_4 (.A ( lvsel_rxdig_q_3_ ) , .Z ( cshi_so31 ) ) ; SCBUFX4 cts_psyn_5 (.A ( n675 ) , .Z ( cshi_so23 ) ) ; SCIVX4 ICC_CTS_1_lzd_scivx6_G1B1I40 (.A ( ref_clk_cts_0_1 ) , .Z ( net_ICC_CTS_1__G1B6I40 ) ) ; SCIVX4 ICC_CTS_1_lzd_scivx6_G1B1I41 (.A ( ref_clk_cts_1_1 ) , .Z ( net_ICC_CTS_1__G1B6I41 ) ) ; SCIVX4 ICC_CTS_1_lzd_scivx6_G1B1I42 (.A ( ref_clk_cts_1_1 ) , .Z ( net_ICC_CTS_1__G1B6I42 ) ) ; SCIVX4 ICC_CTS_1_lzd_scivx6_G1B1I43 (.A ( ref_clk_cts_1_1 ) , .Z ( net_ICC_CTS_1__G1B6I43 ) ) ; SCIVX4 ICC_CTS_1_lzd_scivx6_G1B1I44 (.A ( ref_clk_cts_1_1 ) , .Z ( net_ICC_CTS_1__G1B6I44 ) ) ; SCIVX4 ICC_CTS_1_lzd_scivx6_G1B1I48 (.A ( ref_clk_cts_0_1 ) , .Z ( net_ICC_CTS_1__G1B6I48 ) ) ; SCIVX4 ICC_CTS_1_lzd_scivx6_G1B1I65 (.A ( ref_clk_cts_1_1 ) , .Z ( net_ICC_CTS_1__G1B6I65 ) ) ; SCIVX4 ICC_CTS_1_lzd_scivx6_G1B1I66 (.A ( ref_clk_cts_1_1 ) , .Z ( net_ICC_CTS_1__G1B6I66 ) ) ; SCIVX4 ICC_CTS_1_lzd_scivx6_G1B1I67 (.A ( ref_clk_cts_1_1 ) , .Z ( net_ICC_CTS_1__G1B6I67 ) ) ; SCIVX4 ICC_CTS_1_lzd_scivx6_G1B1I68 (.A ( ref_clk_cts_1_1 ) , .Z ( net_ICC_CTS_1__G1B6I68 ) ) ; SCIVX4 ICC_CTS_1_lzd_scivx6_G1B1I69 (.A ( ref_clk_cts_0_1 ) , .Z ( net_ICC_CTS_1__G1B6I69 ) ) ; SCBUFX4 pl_psyn_1 (.A ( n32 ) , .Z ( LVSEL_JSDSJUL[1] ) ) ; SIVX4 place_63 (.Z ( n761 ) , .A ( n661 ) ) ; SIVX4 place_64 (.Z ( n762 ) , .A ( n488 ) ) ; SIVX4 place_65 (.Z ( n763 ) , .A ( n447 ) ) ; SIVX4 place_66 (.A ( n101 ) , .Z ( n764 ) ) ; SIVX4 place_67 (.Z ( n765 ) , .A ( n98 ) ) ; SIVX4 place_68 (.Z ( n766 ) , .A ( n375 ) ) ; SIVX4 place_69 (.Z ( n767 ) , .A ( n372 ) ) ; SIVX4 place_70 (.Z ( n768 ) , .A ( n370 ) ) ; SIVX4 place_71 (.Z ( n769 ) , .A ( n179 ) ) ; SIVX4 place_72 (.A ( n205 ) , .Z ( n770 ) ) ; SIVX4 place_73 (.A ( n628 ) , .Z ( n771 ) ) ; SIVX4 place_74 (.A ( ops_cal_zzeddr_start ) , .Z ( n772 ) ) ; SIVX4 place_75 (.A ( n616 ) , .Z ( n773 ) ) ; SIVX4 place_76 (.Z ( n774 ) , .A ( n211 ) ) ; SIVX4 place_77 (.A ( n192 ) , .Z ( n775 ) ) ; SIVX4 place_78 (.Z ( n776 ) , .A ( zzeddr_in[3] ) ) ; SIVX4 place_79 (.Z ( n777 ) , .A ( zzeddr_in[1] ) ) ; SIVX4 place_80 (.Z ( n892 ) , .A ( n601 ) ) ; SIVX4 place_81 (.A ( n636 ) , .Z ( n895 ) ) ; SIVX4 place_82 (.Z ( n896 ) , .A ( n189 ) ) ; SIVX4 place_83 (.Z ( n897 ) , .A ( LVSEL_TXCLK[2] ) ) ; SIVX4 place_84 (.Z ( n898 ) , .A ( LVSEL_TXCLK[3] ) ) ; SIVX4 place_85 (.Z ( n899 ) , .A ( LVSEL_TXCLK[1] ) ) ; SIVX4 place_86 (.Z ( n900 ) , .A ( n21 ) ) ; SIVX4 place_87 (.Z ( n901 ) , .A ( n525 ) ) ; SIVX4 place_88 (.A ( n642 ) , .Z ( n902 ) ) ; SIVX4 place_89 (.A ( n620 ) , .Z ( n903 ) ) ; SIVX4 place_90 (.A ( n624 ) , .Z ( n904 ) ) ; SIVX4 place_91 (.A ( n632 ) , .Z ( n905 ) ) ; SCBUFX4 place_92 (.A ( n287 ) , .Z ( n906 ) ) ; SIVX4 place_93 (.A ( n906 ) , .Z ( n907 ) ) ; SIVX4 place_94 (.Z ( n909 ) , .A ( n316 ) ) ; SIVX4 place_95 (.Z ( n910 ) , .A ( n200 ) ) ; SIVX4 place_96 (.A ( n515 ) , .Z ( n912 ) ) ; SIVX4 place_97 (.A ( n479 ) , .Z ( n913 ) ) ; SIVX4 place_98 (.Z ( n914 ) , .A ( n377 ) ) ; SIVX4 place_99 (.A ( n556 ) , .Z ( n915 ) ) ; SIVX4 place_100 (.A ( n613 ) , .Z ( n916 ) ) ; SIVX4 place_101 (.Z ( n918 ) , .A ( n344 ) ) ; SIVX4 place_102 (.Z ( n919 ) , .A ( n303 ) ) ; SIVX4 place_103 (.A ( n421 ) , .Z ( n920 ) ) ; SIVX4 place_104 (.Z ( n921 ) , .A ( n391 ) ) ; SIVX4 place_105 (.Z ( n922 ) , .A ( n1 ) ) ; SIVX4 place_106 (.Z ( n923 ) , .A ( n383 ) ) ; SIVX4 place_107 (.A ( n416 ) , .Z ( n924 ) ) ; SIVX4 place_108 (.Z ( n925 ) , .A ( n283 ) ) ; SIVX4 place_109 (.A ( n591 ) , .Z ( n926 ) ) ; SCBUFX4 place_53 (.A ( IN24 ) , .Z ( n728 ) ) ; SNR2X4 place_16 (.Z ( n927 ) , .A ( n281 ) , .B ( n223 ) ) ; SNN2X4 place_23 (.A ( n142 ) , .Z ( n930 ) , .B ( n207 ) ) ; SNR2X4 place_27 (.A ( curr_state[0] ) , .Z ( n989 ) , .B ( n78 ) ) ; SCBUFX4 place_1 (.A ( IN59 ) , .Z ( n394 ) ) ; SCBUFX4 place_2 (.A ( IN59 ) , .Z ( n398 ) ) ; SIVX4 place_3 (.A ( lvsel_txintp_q[4] ) , .Z ( n404 ) ) ; SIVX4 place_4 (.A ( lvsel_txdrv_q_4_ ) , .Z ( n408 ) ) ; SIVX4 place_6 (.A ( int_HIOPSR ) , .Z ( n411 ) ) ; SIVX4 place_9 (.A ( lvsel_txintp_q[0] ) , .Z ( n415 ) ) ; SIVX4 place_10 (.A ( lvsel_txsujuju_q[0] ) , .Z ( n418 ) ) ; SIVX4 place_11 (.A ( lvsel_txclk_q[0] ) , .Z ( n420 ) ) ; SIVX4 place_13 (.A ( lvsel_txsujuju_q[1] ) , .Z ( n425 ) ) ; SIVX4 place_14 (.A ( lvsel_txsujuju_q[2] ) , .Z ( n426 ) ) ; SIVX4 place_15 (.A ( lvsel_txclk_q[2] ) , .Z ( n429 ) ) ; SCBUFX4 place_17 (.A ( n991 ) , .Z ( LVSEL_RXWHTH[0] ) ) ; SIVX4 place_18 (.Z ( n436 ) , .A ( micho_1m_jsu_0_ ) ) ; SCBUFX4 place_19 (.A ( n990 ) , .Z ( LVSEL_RXDIG[1] ) ) ; SIVX4 place_20 (.Z ( n439 ) , .A ( ops_cal_start_sync2 ) ) ; SIVX4 place_34 (.A ( lvsel_txclk_q[4] ) , .Z ( n540 ) ) ; SIVX4 place_35 (.A ( lvsel_txsujuju_q[4] ) , .Z ( n554 ) ) ; SIVX4 place_37 (.A ( HIOPSR_jsu_1M_div1024_9_ ) , .Z ( n580 ) ) ; SIVX4 place_40 (.A ( exten_mmslv_txdrv_sync2 ) , .Z ( n610 ) ) ; SIVX4 place_42 (.A ( cshi_so17 ) , .Z ( n641 ) ) ; SIVX4 place_43 (.A ( cshi_so20 ) , .Z ( n644 ) ) ; SIVX4 place_44 (.A ( exten_mmslv_txintp_sync2 ) , .Z ( n647 ) ) ; SCBUFX4 place_45 (.A ( jcq_cal_ops_hsdlfuous_mode_sync2 ) , .Z ( n673 ) ) ; SIVX4 place_46 (.A ( n673 ) , .Z ( n674 ) ) ; SIVX4 place_47 (.A ( IN25 ) , .Z ( n676 ) ) ; SIVX4 place_48 (.Z ( n687 ) , .A ( jcq_ops_cal_read[3] ) ) ; SIVX4 place_49 (.Z ( n702 ) , .A ( ext_mmslv_rxdig[3] ) ) ; SIVX4 place_50 (.Z ( n704 ) , .A ( ext_mmslv_rxdig[2] ) ) ; SIVX4 place_51 (.A ( n24 ) , .Z ( n725 ) ) ; SIVX4 place_52 (.Z ( n726 ) , .A ( n360 ) ) ; SIVX4 place_59 (.A ( n728 ) , .Z ( n757 ) ) ; SCBUFX4 place_60 (.A ( micho_1m ) , .Z ( n758 ) ) ; SIVX4 place_61 (.A ( n758 ) , .Z ( n759 ) ) ; SIVX4 place_62 (.A ( n534 ) , .Z ( n760 ) ) ; SBUFX4 U93 (.Z ( net40 ) , .A ( HIOPSR_sync1 ) ) ; endmodule