Usage: gof [options] netlists
GOF options:
-h: print out this info.
-synlib technology_library: Load in technology library (synthesis library) which has parameters for leaf gates.
There can be multiple -synlib options,
if the design has more than one technology library files.
-v option can be removed, if all leaf gates have been covered
by technology library files.
-v simulation_library: Specify simulation library file name which has verilog definition
for leaf gates, like AND2X4.
There can be multiple -v options,
if the design has more than one simulation library.
Both -v and -synlib options are for leaf gates definition.
But -synlib can support more features, like logic cone extraction.
In some cases, some leaf cells don't have technology library,
simulation lbrary is used instead to resolve the cells.
-v option can coexist with -synlib option.
-vn library_name: Specify none leaf gates library file. For example, a file has
collection of macro cell which is defined by leaf gates.
-y library_directory: Specify library directory, one file corresponds to one leaf gate.
+libext+.v should be used with -y option.
-yn library_directory: The files in the directory are not defining leaf gates.
+libext+.v: Specify library file extension in library directory.
it can be +libext+.v+.vg+.vlib,
if .vg and .vlib are also lib extensions.
-run script_file.pl: Invoke GofCall to run netlist processing script, Gof will stay in shell mode when the script finishs.
-shell: Run in text mode with shell prompt, GofCall APIs can be run in interactive mode in shell
-o log_file: Save log file, default gatesof.log
netlists: Load netlist. There can be multiple netlist files listed,
if the design has more than one netlist files.
+define+PARAMETER0+PARAMETER1: Define PARAMETER0 PARAMETER1.
-id mydesign: Specify design id will appear on tile. Optional.
-pdef pdef_file: Load in pdef file which has position information.
There can be multiple -pdef options,
if the design has more than one pdef files.
-gtech gtech_file: Load in gtech file for wire matching.
-sparelist spare_cells_list_file: Load in spare cells list file.
-ecofile eco_file.eco: To run logic cone replacement, setup by eco_file.eco
-rtl: RTL mode. By default GOF assumes the design loaded is netlist.
-------------------------------------------Examples-----------------------------------------
gof -synlib tsmc.lib soc.v
# You have one netlist file 'soc.v' and one technology library, 'tsmc.lib'
gof -synlib tsmc_std.lib -synlib tsmc_io.lib top.v part0.v part1.v
# You have three netlists, top.v, part0.v and part1.v, two technology library files
# standard library cell, tsmc_std.lib, IO cells, tsmc_io.lib
gof -synlib tsmc_std.lib -synlib tsmc_io.lib -vn macros.v top.v part0.v part1.v
# Same as above except a macros.v, which has defined macro cells like sync-cells.
gof -synlib tsmc_std.lib -synlib tsmc_io.lib -vn macros.v -v analog_models.v top.v part0.v part1.v
# Same as above except some analog cells having no technology library,
# using '-v' option instead to load in analog simulation library.
gof -v /home/lib/tsmc_cells.v /home/netlist/soc.v
# You would rather to use simulation library instead of technology library
gof -v /home/lib/tsmc_cells.v -v /home/lib/macro_cells.v +libext+.v -y /home/lib /home/netlist/top.v /home/netlist/soc.v
# Multiple simulation library files, and some leaf cells are defined in '/home/lib' directory,
# which uses '-y' option to resolve them.
gof -v /home/lib/tsmc_cells.v +libext+.v -y /home/lib -yn /home/vmodule /home/netlist/soc.v
# '/home/vmodule' has some macro cells files.
gof -v /home/lib/tsmc_cells.v /home/netlist/soc0.v /home/netlist/soc1.v -id the_soc_design
# You would like to display 'the_soc_design' as the title.
gof -synlib tsmc.lib -pdef soc.pdef.gz soc.v
# Physical Design Exchange Format file soc.pdef.gz has leaf cells position.
gof -v /home/lib/tsmc_cells.v /home/netlist/soc.v -gtech soc_submod.gtech.gv
# Load in gtech file for RTL wire to netlist mapping
gof -rtl -v lib.v +libext+.v -y /home/all_verilog_files -y /home/rams /home/topmodule/top.v
# RTL mode
gof -synlib tsmc.lib soc.v -run scripts.pl
# Process netlist with scripts.pl in text mode
|