NanDigits Design Automation

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2.21.Trace Buffers.

• Trace buffers function can be enabled by selecting one input/output pin and mouse-right-click to pop menu and do Trace buffers.
• The pin's direction affects behavior. The following shows input pin. 

• All the buffers/inverters are displayed on the screen until the non-buffer gate.

• Select an output pin and do Trace buffers command.

• Setup fanout buffers trace window pops up for you to input logic level limit and by-passing gates information.
• Logic level is how many gate level from source to destination.
• The by-passing gate option is useful for tracing clock tree in low power design which has a lot of gated clock cell.
• In this case the gated clock cell has naming style LATCK.

• The clock buffer tree is displayed on the screen.

• Zoom-out schematic.

• You can move cells anywhere you like.

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