NanDigits Design Automation

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3.9. Metal layers only ECO.

• When silicon is back, ECOs have to be done on metal layers only.
• This flow requires spare cells have been inserted into silicon die before taped out.
• These spare cells have all inputs tied low and output floating.
• The instance naming of the spare cells can be expressed by a regular expression such as spare_\w+_\d+
• For example, spare_AOI33X4_89, spare_CLKINVX1_135 ...
• The last digital string has to be unique.
• You can modify the default instance naming style in Setup window.
• GofTrace->Options->Setup

• The spare cells should appear in netlist, like

  CLKINVX1 spare_CLKINVX1_10();
  CLKINVX1 spare_CLKINVX1_11();
  CLKINVX1 spare_CLKINVX1_12();
  CLKINVX1 spare_CLKINVX1_13();
  CLKINVX1 spare_CLKINVX1_14();

• GofViewer->Actions->Create spare cells file          

• 'Spare cells' window pops up to show all spare cells.
• Some output floating cells will also be regarded as spare cells. Like the highlited one.
• File->'Save as' to save it as a spare cells list file.

• Save as sparecells.list.txt
• If several engineers are working on the same netlist. The spare cells list file should be generated only once and everyone has write access to the file.

• Load spare cells file which has been generated.

• Load PDEF Position File.
• GOF needs position information to claim closest spare cell.

• When check ECO checkbutton, enable 'Metal only' checkbutton in GOfECO warning window.

• The following schematic needs to do ECO.
• pp_rdy should be AND with sd_s2_valid signal.

• Load in NAND2X4 and CLKINVX20.

• After cuts and connections, the ECOed schematic.
• The ECO cells have 'ECOCELL' string in name.
• Click Claim spare cells button.

• Choose to save schematic before claim spare cells.

• 'Claim Spare Cells' window pops up to show the spare cells claiming result.

• The final shematic shows the ECO cells have claimed the optimal spare cells.

• Synopsys TCL format result.

#Metal layers only

current_design TM_P_sf
create_port -direction out sd_s2_valid
connect_net [get_nets sd_s2_valid] [get_ports sd_s2_valid]
current_design TM_qcif
disconnect_net [get_nets pp_rdy] [get_pins U80/A1N]
create_cell eco012345_spare_CLKINVX20_216 artisan_tsmc90lp_hv.synth/CLKINVX20
create_cell eco012345_spare_NAND2X4_9 artisan_tsmc90lp_hv.synth/NAND2X4
create_net eco012345_ECONET_1_Y
create_net eco012345_ECONET_0_Y
create_net eco012345_ECONET_2_port
connect_net [get_nets eco012345_ECONET_1_Y] [get_pins U80/A1N]
connect_net [get_nets eco012345_ECONET_0_Y] [get_pins eco012345_spare_CLKINVX20_216/A]
connect_net [get_nets eco012345_ECONET_1_Y] [get_pins eco012345_spare_CLKINVX20_216/Y]
connect_net [get_nets pp_rdy] [get_pins eco012345_spare_NAND2X4_9/A]
connect_net [get_nets eco012345_ECONET_0_Y] [get_pins eco012345_spare_NAND2X4_9/Y]
connect_net [get_nets eco012345_ECONET_2_port] [get_pins eco012345_spare_NAND2X4_9/B]
connect_net [get_nets eco012345_ECONET_2_port] [get_pins uinst_hshf/sd_s2_valid]

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