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Advanced Netlist ECO Flow, part 1, Script programming to modify netlists 1. Why do script programming for netlist? The Integrated Circuit is doubling size every two years. Netlist size is getting too large to be handled manually. Some designs would add Design For Test logic, low power implementation, or other special circuit after netlists are generated by synthesis tool. All these new logic should be checked by some programs and the errors found should be fixed by the programs or redo the processing flow. If ECO change involves a huge size bus, script is desired to change the netlist. 2. GofCall APIs provide interface with netlist GofCall APIs integrate necessary functions to access netlist. For example, @drivers = get_drivers($the_net_name); # To find out a net's driver @connections = get_conns("$instance/$pin"); # To find out the pin connection of the instance change_pin("$instance/$pin", $the_net_name); # Change the pin's connection to the net GofCall supports Perl compatible scripts. Perl is very popular in IC designs. Tons of in-house tools are written in Perl script. GofCall can easily utilize the in-house scripts. Plus the Perl's powerful text processing capability, GofCall can do some complicated ECOs easily For example, to add a MUX and INV to a lot of output ports my @outs = get_ports("output", "qcifhnumber*"); Each output port may have multiple internal loads, these internal loads may need to by pass the MUX/INV. The script can be modifed to my @outs =
get_ports("output", "qcifhnumber*"); Check GofCall features for detail 4. Highly automated process compared with Design Compiler TCL script GofCall relieves designers from the tedious gates/wires/ports manipulations. Designers can focus on the real logic changes. For example, connect a wire from several hierarchies away change_pin("a/b/c/d/e/$instance/$pin", "d/e/f/g/h/the_wire"); GofCall needs only one line to connect a wire in hierarchy d/e/f/g/h to hierarchy a/b/c/d/e, while TCL script or manually change would need all ports to be explicitly created. The nesting feature will save big efforts too change_net("hbeat2dly", "AND2X2", "eco123_and0", "AND2X2(-,U144/Y),OR2X2(INVX2(U537/Y),-)"); The original circuit is like this
It has been changed to
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